From patchwork Fri Mar 2 07:00:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang Z" X-Patchwork-Id: 144146 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A0E78B6F9D for ; Fri, 2 Mar 2012 18:02:59 +1100 (EST) Received: from localhost ([::1]:43254 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MW1-0003vw-G8 for incoming@patchwork.ozlabs.org; Fri, 02 Mar 2012 02:02:57 -0500 Received: from eggs.gnu.org ([208.118.235.92]:55632) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MVV-0002nJ-7D for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:02:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S3MVO-0007sV-Rb for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:02:24 -0500 Received: from mga03.intel.com ([143.182.124.21]:10710) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S3MVO-0007ro-L7 for qemu-devel@nongnu.org; Fri, 02 Mar 2012 02:02:18 -0500 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 01 Mar 2012 23:02:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="scan'208";a="113691922" Received: from pgsmsx509.gar.corp.intel.com ([172.30.13.17]) by azsmga001.ch.intel.com with ESMTP; 01 Mar 2012 23:02:10 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by PGSMSX509.gar.corp.intel.com (172.30.13.17) with Microsoft SMTP Server (TLS) id 8.2.255.0; Fri, 2 Mar 2012 15:00:29 +0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.142]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.91]) with mapi id 14.01.0355.002; Fri, 2 Mar 2012 15:00:27 +0800 From: "Zhang, Yang Z" To: "qemu-devel@nongnu.org" Thread-Topic: [PATCH v3 6/7] RTC:Add alarm support Thread-Index: Acz4QiRwZfGI9m4nTmCvvfbkIIhTrw== Date: Fri, 2 Mar 2012 07:00:27 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 143.182.124.21 Cc: Paolo Bonzini , "aliguori@us.ibm.com" , Marcelo Tosatti , Jan Kiszka , "kvm@vger.kernel.org" Subject: [Qemu-devel] [PATCH v3 6/7] RTC:Add alarm support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add the alarm check when update cycle ended. If alarm is fired, also AIE bit is setting, then raise a interrupt Signed-off-by: Yang Zhang --- hw/mc146818rtc.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 46 insertions(+), 2 deletions(-) -- 1.7.1 diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index fae049e..384bdc1 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -114,6 +114,7 @@ typedef struct RTCState { static void rtc_set_time(RTCState *s); static void rtc_calibrate_time(RTCState *s); static void rtc_set_cmos(RTCState *s); +static inline int rtc_from_bcd(RTCState *s, int a); static int32_t divider_reset; @@ -267,15 +268,58 @@ static void rtc_update_timer(void *opaque) } } +static inline uint8_t convert_hour(RTCState *s, uint8_t hour) +{ + if (!(s->cmos_data[RTC_REG_B] & REG_B_24H)) { + hour %= 12; + if (s->cmos_data[RTC_HOURS] & 0x80) { + hour += 12; + } + } + return hour; +} +static uint32_t check_alarm(RTCState *s) +{ + uint8_t alarm_hour, alarm_min, alarm_sec; + uint8_t cur_hour, cur_min, cur_sec; + + rtc_calibrate_time(s); + rtc_set_cmos(s); + + alarm_sec = rtc_from_bcd(s, s->cmos_data[RTC_SECONDS_ALARM]); + alarm_min = rtc_from_bcd(s, s->cmos_data[RTC_MINUTES_ALARM]); + alarm_hour = rtc_from_bcd(s, s->cmos_data[RTC_HOURS_ALARM]); + alarm_hour = convert_hour(s, alarm_hour); + + cur_sec = rtc_from_bcd(s, s->cmos_data[RTC_SECONDS]); + cur_min = rtc_from_bcd(s, s->cmos_data[RTC_MINUTES]); + cur_hour = rtc_from_bcd(s, s->cmos_data[RTC_HOURS]); + cur_hour = convert_hour(s, cur_hour); + + if (((alarm_sec & 0xc0) == 0xc0 || alarm_sec == cur_sec) && + ((alarm_min & 0xc0) == 0xc0 || alarm_min == cur_min) && + ((alarm_hour & 0xc0) == 0xc0 || alarm_hour == cur_hour)) { + return 1; + } + return 0; + +} + static void rtc_update_timer2(void *opaque) { RTCState *s = opaque; if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) { s->cmos_data[RTC_REG_C] |= REG_C_UF; + if (check_alarm(s)) { + s->cmos_data[RTC_REG_C] |= REG_C_AF; + } + s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; - s->cmos_data[RTC_REG_C] |= REG_C_IRQF; - qemu_irq_raise(s->irq); + if (s->cmos_data[RTC_REG_B] & (REG_B_AIE | REG_B_UIE)) { + s->cmos_data[RTC_REG_C] |= REG_C_IRQF; + qemu_irq_raise(s->irq); + } } check_update_timer(s); }