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From: Ramana Radhakrishnan To: gcc-patches Cc: Patch Tracking , Richard Earnshaw X-Gm-Message-State: ALoCoQkmSzGkDEKWjiZYB++ZAe+Xc6zXFS0PBULWnRX1MNcdCN/RmyNJuHJb24awprSHoObPHNWm X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi , This patch turns on hot cold partitioning for the ARM target. Given that NOTE_INSN_SWITCH_SECTIONS gets created once - we should see that this works. Passed testing with cross on qemu - Simple handwritten tests for this appear to work. I'll commit this for 4.8 and would like some feedback for this. regards, Ramana 2012-02-29 Ramana Radhakrishnan * config/arm/arm.c (arm_option_override): Allow hot cold partitioning. (arm_reorg): Handle NOTE_INSN_SWITCH_TEXT_SECTIONS. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b58877b..b9fd116 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1976,16 +1976,6 @@ arm_option_override (void) else max_insns_skipped = current_tune->max_insns_skipped; - /* Hot/Cold partitioning is not currently supported, since we can't - handle literal pool placement in that case. */ - if (flag_reorder_blocks_and_partition) - { - inform (input_location, - "-freorder-blocks-and-partition not supported on this architecture"); - flag_reorder_blocks_and_partition = 0; - flag_reorder_blocks = 1; - } - if (flag_pic) /* Hoisting PIC address calculations more aggressively provides a small, but measurable, size reduction for PIC code. Therefore, we decrease @@ -13332,8 +13322,21 @@ arm_reorg (void) minipool_pad = 0; /* Scan all the insns and record the operands that will need fixing. */ - for (insn = next_nonnote_insn (insn); insn; insn = next_nonnote_insn (insn)) + for (insn = next_nondebug_insn (insn); insn; insn = next_nondebug_insn (insn)) { + if (NOTE_P (insn)) + { + if (NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) + { + /* Given we cannot address a range greater than 4M go + ahead and increase the address sky high to force + all pools before this note to be dumped. */ + address += 0x400000; + } + else + continue; + } + if (TARGET_CIRRUS_FIX_INVALID_INSNS && (arm_cirrus_insn_p (insn) || GET_CODE (insn) == JUMP_INSN