[8/8] Make dma_addr_t 64 bit always

---
 dma.h |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

On Fri, Feb 24, 2012 at 02:27:43PM +1100, David Gibson wrote:

Oops, ignore this one folks.  As is probably obvious, this was a
testing patch not meant to go into the main series.

> ---
>  dma.h |    9 ++++++---
>  1 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/dma.h b/dma.h
> index b8cfd1d..ee540f4 100644
> --- a/dma.h
> +++ b/dma.h
> @@ -18,10 +18,13 @@
>  typedef struct ScatterGatherEntry ScatterGatherEntry;
>  
>  #if defined(TARGET_PHYS_ADDR_BITS)
> -typedef target_phys_addr_t dma_addr_t;
> +/* Bus addresses can be different size from CPU physical addresses,
> + * and indeed they can be different on different busses.  So make
> + * these always 64-bit which should handle every usual case */
> +typedef uint64_t dma_addr_t;
>  
> -#define DMA_ADDR_BITS TARGET_PHYS_ADDR_BITS
> -#define DMA_ADDR_FMT TARGET_FMT_plx
> +#define DMA_ADDR_BITS 64
> +#define DMA_ADDR_FMT "%" PRIx64
>  
>  typedef enum {
>      DMA_DIRECTION_TO_DEVICE = 0,

On Fri, Feb 24, 2012 at 04:57, David Gibson <david@gibson.dropbear.id.au> wrote:
> On Fri, Feb 24, 2012 at 02:27:43PM +1100, David Gibson wrote:
>
> Oops, ignore this one folks.  As is probably obvious, this was a
> testing patch not meant to go into the main series.

Actually I'm not sure what would be the correct way to calculate the
size. For example, on Sparc32 the virtual address space and CPU
registers are 32 bits, physical address space 36 bits, but device
virtual memory address space (DVMA, used by devices to talk to IOMMU)
is only 32 bits.

>> ---
>>  dma.h |    9 ++++++---
>>  1 files changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/dma.h b/dma.h
>> index b8cfd1d..ee540f4 100644
>> --- a/dma.h
>> +++ b/dma.h
>> @@ -18,10 +18,13 @@
>>  typedef struct ScatterGatherEntry ScatterGatherEntry;
>>
>>  #if defined(TARGET_PHYS_ADDR_BITS)
>> -typedef target_phys_addr_t dma_addr_t;
>> +/* Bus addresses can be different size from CPU physical addresses,
>> + * and indeed they can be different on different busses.  So make
>> + * these always 64-bit which should handle every usual case */
>> +typedef uint64_t dma_addr_t;
>>
>> -#define DMA_ADDR_BITS TARGET_PHYS_ADDR_BITS
>> -#define DMA_ADDR_FMT TARGET_FMT_plx
>> +#define DMA_ADDR_BITS 64
>> +#define DMA_ADDR_FMT "%" PRIx64
>>
>>  typedef enum {
>>      DMA_DIRECTION_TO_DEVICE = 0,
>
> --
> David Gibson                    | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
>                                | _way_ _around_!
> http://www.ozlabs.org/~dgibson
>

On Sun, Feb 26, 2012 at 09:46:52PM +0000, Blue Swirl wrote:
> On Fri, Feb 24, 2012 at 04:57, David Gibson <david@gibson.dropbear.id.au> wrote:
> > On Fri, Feb 24, 2012 at 02:27:43PM +1100, David Gibson wrote:
> >
> > Oops, ignore this one folks.  As is probably obvious, this was a
> > testing patch not meant to go into the main series.
> 
> Actually I'm not sure what would be the correct way to calculate the
> size. For example, on Sparc32 the virtual address space and CPU
> registers are 32 bits, physical address space 36 bits, but device
> virtual memory address space (DVMA, used by devices to talk to IOMMU)
> is only 32 bits.

Well, yes, in fact I think we probably do need to use 64-bit addresses
always (or at least whenever we have any kind of IOMMU support
available), because it's almost impossible to be certain that a
platform could never have a 64-bit bus of some kind plugged in.

But that's a matter for another day.