Patchwork [Xen-devel,V7,00/11] Xen PCI Passthrough

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Submitter Anthony PERARD
Date Feb. 22, 2012, 2:56 p.m.
Message ID <alpine.DEB.2.00.1202221445530.22850@perard.uk.xensource.com>
Download mbox | patch
Permalink /patch/142476/
State New
Headers show

Comments

Anthony PERARD - Feb. 22, 2012, 2:56 p.m.
On Mon, 20 Feb 2012, Anthony PERARD wrote:

> On Mon, Feb 20, 2012 at 19:58, Tobias Geiger <tobias.geiger@vido.info> wrote:
> > [00:06.0] pt_pci_read_config: address=0x0030 val=0x00000000 len=4
> > [00:06.0] pt_pci_write_config: address=0x0030 val=0xffffffff len=4
> > [00:06.0] pt_iomem_map: BAR 6, e_phys=0xffffffffffffffff maddr=0xc3140000 len=0x20000 first_map=1
> > [00:06.0] pt_pci_read_config: address=0x0030 val=0xfffe0001 len=4
> > [00:06.0] pt_pci_write_config: address=0x0030 val=0x00000000 len=4
> > [00:06.0] pt_iomem_map: BAR 6, e_phys=0xffffffffffffffff maddr=0xc3140000 len=0x20000 first_map=0
> ...
> > [00:06.0] pt_pci_read_config: address=0x0004 val=0x00000000 len=2
> > [00:06.0] pt_pci_write_config: address=0x0004 val=0x00000004 len=2
> > qemu-system-x86_64: /usr/src/xen-with-upstream-qemu-patch/upstream-qemu/qemu/memory.c:1378: memory_region_del_subregion: Assertion `subregion->parent == mr' failed.
>
> This last line is why QEMU fail and I thinks it's because I never try
> a PCI device with a ROM pci bar. I'll try to fix this tomorrow.

Could you tell me if this "patch" resolve the issue?


Thanks,

Patch

diff --git a/hw/xen_pci_passthrough_config_init.c b/hw/xen_pci_passthrough_config_init.c
index f1fffd1..37aa383 100644
--- a/hw/xen_pci_passthrough_config_init.c
+++ b/hw/xen_pci_passthrough_config_init.c
@@ -555,18 +555,16 @@  static int pt_exp_rom_bar_reg_write(XenPCIPassthroughState *s,
     XenPTReg *reg_entry = NULL;
     XenPTRegion *base = NULL;
     PCIDevice *d = (PCIDevice *)&s->dev;
-    PCIIORegion *r;
     uint32_t writable_mask = 0;
     uint32_t throughable_mask = 0;
     pcibus_t r_size = 0;
     uint32_t bar_emu_mask = 0;
     uint32_t bar_ro_mask = 0;

-    r = &d->io_regions[PCI_ROM_SLOT];
-    r_size = r->size;
+    r_size = d->io_regions[PCI_ROM_SLOT].size;
     base = &s->bases[PCI_ROM_SLOT];
     /* align memory type resource size */
-    pt_get_emul_size(base->bar_flag, r_size);
+    r_size = pt_get_emul_size(base->bar_flag, r_size);

     /* set emulate mask and read-only mask */
     bar_emu_mask = reg->emu_mask;
@@ -576,19 +574,6 @@  static int pt_exp_rom_bar_reg_write(XenPCIPassthroughState *s,
     writable_mask = ~bar_ro_mask & valid_mask;
     cfg_entry->data = PT_MERGE_VALUE(*value, cfg_entry->data, writable_mask);

-    /* update the corresponding virtual region address */
-    /*
-     * When guest code tries to get block size of mmio, it will write all "1"s
-     * into pci bar register. In this case, cfg_entry->data == writable_mask.
-     * Especially for devices with large mmio, the value of writable_mask
-     * is likely to be a guest physical address that has been mapped to ram
-     * rather than mmio. Remapping this value to mmio should be prevented.
-     */
-
-    if (cfg_entry->data != writable_mask) {
-        r->addr = cfg_entry->data;
-    }
-
     /* create value for writing to I/O device register */
     throughable_mask = ~bar_emu_mask & valid_mask;
     *value = PT_MERGE_VALUE(*value, dev_value, throughable_mask);