From patchwork Thu Feb 16 17:21:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 141649 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 6ABEE10084F for ; Fri, 17 Feb 2012 04:23:17 +1100 (EST) Received: by ozlabs.org (Postfix) id 0DCA5B6EE6; Fri, 17 Feb 2012 04:21:21 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: from ch1outboundpool.messaging.microsoft.com (ch1ehsobe006.messaging.microsoft.com [216.32.181.186]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 8862B1007D3 for ; Fri, 17 Feb 2012 04:21:20 +1100 (EST) Received: from mail10-ch1-R.bigfish.com (10.43.68.236) by CH1EHSOBE004.bigfish.com (10.43.70.54) with Microsoft SMTP Server id 14.1.225.23; Thu, 16 Feb 2012 17:21:18 +0000 Received: from mail10-ch1 (localhost [127.0.0.1]) by mail10-ch1-R.bigfish.com (Postfix) with ESMTP id D55BCC0152; Thu, 16 Feb 2012 17:21:17 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail10-ch1 (localhost.localdomain [127.0.0.1]) by mail10-ch1 (MessageSwitch) id 1329412876445923_7791; Thu, 16 Feb 2012 17:21:16 +0000 (UTC) Received: from CH1EHSMHS019.bigfish.com (snatpool2.int.messaging.microsoft.com [10.43.68.232]) by mail10-ch1.bigfish.com (Postfix) with ESMTP id 6AD4D2C0045; Thu, 16 Feb 2012 17:21:16 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS019.bigfish.com (10.43.70.19) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 16 Feb 2012 17:21:13 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.1.355.3; Thu, 16 Feb 2012 11:21:12 -0600 Received: from efes.am.freescale.net (efes.am.freescale.net [10.82.123.3]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id q1GHLBSE024566; Thu, 16 Feb 2012 10:21:12 -0700 From: Timur Tabi To: , Subject: [PATCH 2/2] [v2] powerpc/fsl: add PAMUBYPENR register definition to fsl_guts.h Date: Thu, 16 Feb 2012 11:21:10 -0600 Message-ID: <1329412870-16716-2-git-send-email-timur@freescale.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1329412870-16716-1-git-send-email-timur@freescale.com> References: <1329412870-16716-1-git-send-email-timur@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Add a defintion of register PAMUBYPENR (offset 0x604) to the global utilities structure. PAMUBYPENR is the PAMU bypass enable register. It contains control bits for enabling bypass mode on each PAMU. Signed-off-by: Timur Tabi --- arch/powerpc/include/asm/fsl_guts.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h index a880377..23e483d 100644 --- a/arch/powerpc/include/asm/fsl_guts.h +++ b/arch/powerpc/include/asm/fsl_guts.h @@ -69,7 +69,9 @@ struct ccsr_guts { u8 res0c4[0x224 - 0xc4]; __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ - u8 res22c[0x800 - 0x22c]; + u8 res22c[0x604 - 0x22c]; + __be32 pamubypenr; /* 0x.0604 - PAMU bypass enable register */ + u8 res608[0x800 - 0x608]; __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ u8 res804[0x900 - 0x804]; __be32 ircr; /* 0x.0900 - Infrared Control Register */