[1/7] Introduce a new bus "ICC" to connect APIC

Message ID	1329347774-23262-2-git-send-email-imammedo@redhat.com
State	New
Headers	show Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> From: Igor Mammedov <imammedo@redhat.com> To: qemu-devel@nongnu.org Date: Thu, 16 Feb 2012 00:16:08 +0100 Message-Id: <1329347774-23262-2-git-send-email-imammedo@redhat.com> In-Reply-To: <1329347774-23262-1-git-send-email-imammedo@redhat.com> References: <1329347774-23262-1-git-send-email-imammedo@redhat.com> Cc: jan.kiszka@siemens.com, gleb@redhat.com Subject: [Qemu-devel] [PATCH 1/7] Introduce a new bus "ICC" to connect APIC Precedence: list Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org

diff --git a/Makefile.objs b/Makefile.objs index 4f6d26c..45df666 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -212,7 +212,7 @@ hw-obj-$(CONFIG_USB_UHCI) += usb-uhci.o hw-obj-$(CONFIG_USB_OHCI) += usb-ohci.o hw-obj-$(CONFIG_USB_EHCI) += usb-ehci.o hw-obj-$(CONFIG_FDC) += fdc.o -hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o +hw-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o icc_bus.o hw-obj-$(CONFIG_APM) += pm_smbus.o apm.o hw-obj-$(CONFIG_DMA) += dma.o hw-obj-$(CONFIG_HPET) += hpet.o diff --git a/hw/apic.c b/hw/apic.c index 9d0f460..e666b4c 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -21,9 +21,10 @@ #include "ioapic.h" #include "qemu-timer.h" #include "host-utils.h" -#include "sysbus.h" +#include "icc_bus.h" #include "trace.h" #include "pc.h" +#include "exec-memory.h" /* APIC Local Vector Table */ #define APIC_LVT_TIMER 0 @@ -80,7 +81,7 @@ typedef struct APICState APICState; struct APICState { - SysBusDevice busdev; + ICCBusDevice busdev; MemoryRegion io_memory; void *cpu_env; uint32_t apicbase; @@ -988,9 +989,19 @@ static const MemoryRegionOps apic_io_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static int apic_init1(SysBusDevice *dev) +int apic_mmio_map(DeviceState *dev, target_phys_addr_t base) { - APICState *s = FROM_SYSBUS(APICState, dev); + APICState *s = DO_UPCAST(APICState, busdev.qdev, dev); + + memory_region_add_subregion(get_system_memory(), + base, + &s->io_memory); + return 0; +} + +static int apic_init1(ICCBusDevice *dev) +{ + APICState *s = DO_UPCAST(APICState, busdev, dev); static int last_apic_idx; if (last_apic_idx >= MAX_APICS) { @@ -998,7 +1009,6 @@ static int apic_init1(SysBusDevice *dev) } memory_region_init_io(&s->io_memory, &apic_io_ops, s, "apic", MSI_ADDR_SIZE); - sysbus_init_mmio(dev, &s->io_memory); s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s); s->idx = last_apic_idx++; @@ -1006,7 +1016,7 @@ static int apic_init1(SysBusDevice *dev) return 0; } -static SysBusDeviceInfo apic_info = { +static ICCBusDeviceInfo apic_info = { .init = apic_init1, .qdev.name = "apic", .qdev.size = sizeof(APICState), @@ -1022,7 +1032,7 @@ static SysBusDeviceInfo apic_info = { static void apic_register_devices(void) { - sysbus_register_withprop(&apic_info); + iccbus_register_devinfo(&apic_info); } device_init(apic_register_devices) diff --git a/hw/apic.h b/hw/apic.h index a5c910f..d42081e 100644 --- a/hw/apic.h +++ b/hw/apic.h @@ -17,6 +17,7 @@ void cpu_set_apic_tpr(DeviceState *s, uint8_t val); uint8_t cpu_get_apic_tpr(DeviceState *s); void apic_init_reset(DeviceState *s); void apic_sipi(DeviceState *s); +int apic_mmio_map(DeviceState *dev, target_phys_addr_t base); /* pc.c */ int cpu_is_bsp(CPUState *env); diff --git a/hw/icc_bus.c b/hw/icc_bus.c new file mode 100644 index 0000000..8a3b1ee --- /dev/null +++ b/hw/icc_bus.c @@ -0,0 +1,113 @@ +/* icc_bus.c + * emulate x86 ICC(INTERRUPT CONTROLLER COMMUNICATIONS) bus + * + * Copyright IBM, Corp. 2011 + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/> + */ +#include "icc_bus.h" + +typedef struct CPUSockets CPUSockets; +typedef struct ICCBus ICCBus; +typedef struct ICCBusInfo ICCBusInfo; + +struct CPUSockets { + SysBusDevice sysdev; + ICCBus *icc_bus; +}; + +struct CPUSInfo { + DeviceInfo info; +}; + +struct ICCBus { + BusState qbus; +}; + +struct ICCBusInfo { + BusInfo qinfo; +}; + +static CPUSockets *cpu_sockets; + +static ICCBusInfo icc_bus_info = { + .qinfo.name = "icc", + .qinfo.size = sizeof(ICCBus), + .qinfo.props = (Property[]) { + DEFINE_PROP_END_OF_LIST(), + } +}; + +static int iccbus_device_init(DeviceState *dev, DeviceInfo *base) +{ + ICCBusDeviceInfo *info = container_of(base, ICCBusDeviceInfo, qdev); + ICCBusDevice *idev = DO_UPCAST(ICCBusDevice, qdev, dev); + + return info->init(idev); +} + +void iccbus_register_devinfo(ICCBusDeviceInfo *info) +{ + info->qdev.init = iccbus_device_init; + info->qdev.bus_info = &icc_bus_info.qinfo; + assert(info->qdev.size >= sizeof(ICCBusDevice)); + qdev_register(&info->qdev); +} + +BusState *get_icc_bus(void) +{ + return &cpu_sockets->icc_bus->qbus; +} + +/*Must be called before vcpu's creation*/ +static int cpusockets_init(SysBusDevice *dev) +{ + CPUSockets *cpus = DO_UPCAST(CPUSockets, sysdev, dev); + BusState *b = qbus_create(&icc_bus_info.qinfo, + &cpus->sysdev.qdev, + "icc"); + if (b == NULL) { + return -1; + } + b->allow_hotplug = 1; /* Yes, we can */ + cpus->icc_bus = DO_UPCAST(ICCBus, qbus, b); + cpu_sockets = cpus; + return 0; + +} + +static const VMStateDescription vmstate_cpusockets = { + .name = "cpusockets", + .version_id = 1, + .minimum_version_id = 0, + .fields = (VMStateField[]) { + VMSTATE_END_OF_LIST() + } +}; + +static SysBusDeviceInfo cpusockets_info = { + .init = cpusockets_init, + .qdev.name = "cpusockets", + .qdev.size = sizeof(CPUSockets), + .qdev.vmsd = &vmstate_cpusockets, + .qdev.reset = NULL, + .qdev.no_user = 1, +}; + +static void cpusockets_register_devices(void) +{ + sysbus_register_withprop(&cpusockets_info); +} + +device_init(cpusockets_register_devices) diff --git a/hw/icc_bus.h b/hw/icc_bus.h new file mode 100644 index 0000000..f817873 --- /dev/null +++ b/hw/icc_bus.h @@ -0,0 +1,41 @@ +/* ICCBus.h + * emulate x86 ICC(INTERRUPT CONTROLLER COMMUNICATIONS) bus + * + * Copyright IBM, Corp. 2011 + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/> + */ +#ifndef QEMU_ICC_H +#define QEMU_ICC_H + +#include "qdev.h" +#include "sysbus.h" + +struct ICCBusDevice { + DeviceState qdev; +}; +typedef struct ICCBusDevice ICCBusDevice; +typedef int (*iccbus_initfn)(ICCBusDevice *dev); + +struct ICCBusDeviceInfo { + DeviceInfo qdev; + iccbus_initfn init; +}; +typedef struct ICCBusDeviceInfo ICCBusDeviceInfo; + +BusState *get_icc_bus(void); + +void iccbus_register_devinfo(ICCBusDeviceInfo *info); + +#endif diff --git a/hw/pc.c b/hw/pc.c index 85304cf..33d8090 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -24,6 +24,7 @@ #include "hw.h" #include "pc.h" #include "apic.h" +#include "icc_bus.h" #include "fdc.h" #include "ide.h" #include "pci.h" @@ -878,21 +879,21 @@ DeviceState *cpu_get_current_apic(void) static DeviceState *apic_init(void *env, uint8_t apic_id) { DeviceState *dev; - SysBusDevice *d; + BusState *b; static int apic_mapped; - dev = qdev_create(NULL, "apic"); + b = get_icc_bus(); + dev = qdev_create(b, "apic"); qdev_prop_set_uint8(dev, "id", apic_id); qdev_prop_set_ptr(dev, "cpu_env", env); qdev_init_nofail(dev); - d = sysbus_from_qdev(dev); /* XXX: mapping more APICs at the same memory location */ if (apic_mapped == 0) { /* NOTE: the APIC is directly connected to the CPU - it is not on the global memory bus. */ /* XXX: what if the base changes? */ - sysbus_mmio_map(d, 0, MSI_ADDR_BASE); + apic_mmio_map(dev, MSI_ADDR_BASE); apic_mapped = 1; } @@ -959,6 +960,11 @@ void pc_cpus_init(const char *cpu_model) #endif } + if (cpu_has_apic_feature(cpu_model) || smp_cpus > 1) { + DeviceState *d = qdev_create(NULL, "cpusockets"); + qdev_init_nofail(d); + } + for(i = 0; i < smp_cpus; i++) { pc_new_cpu(cpu_model); } diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 37dde79..7e66bcf 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -892,6 +892,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); int cpu_x86_register (CPUX86State *env, const char *cpu_model); +bool cpu_has_apic_feature(const char *cpu_model); void cpu_clear_apic_feature(CPUX86State *env); void host_cpuid(uint32_t function, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 91a104b..1664c6c 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -850,6 +850,18 @@ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg) } } +bool cpu_has_apic_feature(const char *cpu_model) +{ + x86_def_t def; + + memset(&def, 0, sizeof(def)); + + if (cpu_x86_find_by_name(&def, cpu_model) < 0) { + return false; + } + return def.features & CPUID_APIC; +} + int cpu_x86_register (CPUX86State *env, const char *cpu_model) { x86_def_t def1, *def = &def1;

[1/7] Introduce a new bus "ICC" to connect APIC

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