From patchwork Wed Feb 15 08:49:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Kushwaha X-Patchwork-Id: 141270 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id DC9CA1007DC for ; Wed, 15 Feb 2012 19:49:59 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2B36E2809E; Wed, 15 Feb 2012 09:49:58 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1foruXRT3igV; Wed, 15 Feb 2012 09:49:57 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BAA0128096; Wed, 15 Feb 2012 09:49:55 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E487928096 for ; Wed, 15 Feb 2012 09:49:52 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VR-POSxBd5Ue for ; Wed, 15 Feb 2012 09:49:52 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from DB3EHSOBE001.bigfish.com (db3ehsobe005.messaging.microsoft.com [213.199.154.143]) by theia.denx.de (Postfix) with ESMTPS id 29CDF28095 for ; Wed, 15 Feb 2012 09:49:50 +0100 (CET) Received: from mail12-db3-R.bigfish.com (10.3.81.249) by DB3EHSOBE001.bigfish.com (10.3.84.21) with Microsoft SMTP Server id 14.1.225.23; Wed, 15 Feb 2012 08:49:49 +0000 Received: from mail12-db3 (localhost [127.0.0.1]) by mail12-db3-R.bigfish.com (Postfix) with ESMTP id A2CE0803DE for ; Wed, 15 Feb 2012 08:49:49 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail12-db3 (localhost.localdomain [127.0.0.1]) by mail12-db3 (MessageSwitch) id 1329295787349432_16459; Wed, 15 Feb 2012 08:49:47 +0000 (UTC) Received: from DB3EHSMHS017.bigfish.com (unknown [10.3.81.233]) by mail12-db3.bigfish.com (Postfix) with ESMTP id 4456560045 for ; Wed, 15 Feb 2012 08:49:47 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS017.bigfish.com (10.3.87.117) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 15 Feb 2012 08:49:47 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.355.3; Wed, 15 Feb 2012 02:49:40 -0600 Received: from b32579-VirtualBox.ap.freescale.net (b32579-VirtualBox.ap.freescale.net [10.232.132.74]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id q1F8naXr001090; Wed, 15 Feb 2012 02:49:38 -0600 (CST) From: Prabhakar Kushwaha To: Date: Wed, 15 Feb 2012 14:19:29 +0530 Message-ID: <1329295769-28164-1-git-send-email-prabhakar@freescale.com> X-Mailer: git-send-email 1.7.5.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: afleming@freescale.com Subject: [U-Boot] [PATCH 1/2] powerpc/85xx:Avoid hardcoded vector address for IVORs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de For e500 and e500v2 architecturees processor IVPR address should be alinged on 64K boundary. in start.S, CONFIG_SYS_MONITOR_BASE is stored blindly in IVPR assuming it to be 64K aligned. It may not be true always. If it is not aligned, IVPR + IVORs may not point to an exception handler. Signed-off-by: Prabhakar Kushwaha --- Applies on http://git.denx.de/u-boot.git branch master arch/powerpc/cpu/mpc85xx/start.S | 65 ++++++++++++++++++++------------------ 1 files changed, 34 insertions(+), 31 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 4d37d6e..2b29364 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1,5 +1,5 @@ /* - * Copyright 2004, 2007-2011 Freescale Semiconductor, Inc. + * Copyright 2004, 2007-2012 Freescale Semiconductor, Inc. * Copyright (C) 2003 Motorola,Inc. * * See file CREDITS for list of people who contributed to this @@ -183,37 +183,40 @@ l2_disabled: lis r1,CONFIG_SYS_MONITOR_BASE@h mtspr IVPR,r1 - li r1,0x0100 - mtspr IVOR0,r1 /* 0: Critical input */ - li r1,0x0200 - mtspr IVOR1,r1 /* 1: Machine check */ - li r1,0x0300 - mtspr IVOR2,r1 /* 2: Data storage */ - li r1,0x0400 - mtspr IVOR3,r1 /* 3: Instruction storage */ - li r1,0x0500 - mtspr IVOR4,r1 /* 4: External interrupt */ - li r1,0x0600 - mtspr IVOR5,r1 /* 5: Alignment */ - li r1,0x0700 - mtspr IVOR6,r1 /* 6: Program check */ - li r1,0x0800 - mtspr IVOR7,r1 /* 7: floating point unavailable */ - li r1,0x0900 - mtspr IVOR8,r1 /* 8: System call */ + lis r3,(CONFIG_SYS_MONITOR_BASE & 0xffff)@h + ori r3,r3,(CONFIG_SYS_MONITOR_BASE & 0xffff)@l + + addi r4,r3,CriticalInput - _start + _START_OFFSET + mtspr IVOR0,r4 /* 0: Critical input */ + addi r4,r3,MachineCheck - _start + _START_OFFSET + mtspr IVOR1,r4 /* 1: Machine check */ + addi r4,r3,DataStorage - _start + _START_OFFSET + mtspr IVOR2,r4 /* 2: Data storage */ + addi r4,r3,InstStorage - _start + _START_OFFSET + mtspr IVOR3,r4 /* 3: Instruction storage */ + addi r4,r3,ExtInterrupt - _start + _START_OFFSET + mtspr IVOR4,r4 /* 4: External interrupt */ + addi r4,r3,Alignment - _start + _START_OFFSET + mtspr IVOR5,r4 /* 5: Alignment */ + addi r4,r3,ProgramCheck - _start + _START_OFFSET + mtspr IVOR6,r4 /* 6: Program check */ + addi r4,r3,FPUnavailable - _start + _START_OFFSET + mtspr IVOR7,r4 /* 7: floating point unavailable */ + addi r4,r3,SystemCall - _start + _START_OFFSET + mtspr IVOR8,r4 /* 8: System call */ /* 9: Auxiliary processor unavailable(unsupported) */ - li r1,0x0a00 - mtspr IVOR10,r1 /* 10: Decrementer */ - li r1,0x0b00 - mtspr IVOR11,r1 /* 11: Interval timer */ - li r1,0x0c00 - mtspr IVOR12,r1 /* 12: Watchdog timer */ - li r1,0x0d00 - mtspr IVOR13,r1 /* 13: Data TLB error */ - li r1,0x0e00 - mtspr IVOR14,r1 /* 14: Instruction TLB error */ - li r1,0x0f00 - mtspr IVOR15,r1 /* 15: Debug */ + addi r4,r3,Decrementer - _start + _START_OFFSET + mtspr IVOR10,r4 /* 10: Decrementer */ + addi r4,r3,IntervalTimer - _start + _START_OFFSET + mtspr IVOR11,r4 /* 11: Interval timer */ + addi r4,r3,WatchdogTimer - _start + _START_OFFSET + mtspr IVOR12,r4 /* 12: Watchdog timer */ + addi r4,r3,DataTLBError - _start + _START_OFFSET + mtspr IVOR13,r4 /* 13: Data TLB error */ + addi r4,r3,InstructionTLBError - _start + _START_OFFSET + mtspr IVOR14,r4 /* 14: Instruction TLB error */ + addi r4,r3,DebugBreakpoint - _start + _START_OFFSET + mtspr IVOR15,r4 /* 15: Debug */ /* Clear and set up some registers. */ li r0,0x0000