From patchwork Thu Feb 9 03:24:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wen Congyang X-Patchwork-Id: 140296 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 29C41B6FA4 for ; Thu, 9 Feb 2012 14:21:05 +1100 (EST) Received: from localhost ([::1]:44885 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RvKZ8-0006mR-Lj for incoming@patchwork.ozlabs.org; Wed, 08 Feb 2012 22:20:58 -0500 Received: from eggs.gnu.org ([140.186.70.92]:43228) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RvKZ0-0006mM-Ll for qemu-devel@nongnu.org; Wed, 08 Feb 2012 22:20:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RvKYx-0001X6-8a for qemu-devel@nongnu.org; Wed, 08 Feb 2012 22:20:50 -0500 Received: from [222.73.24.84] (port=51353 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RvKYv-0001Wy-Vg for qemu-devel@nongnu.org; Wed, 08 Feb 2012 22:20:47 -0500 Received: from tang.cn.fujitsu.com (tang.cn.fujitsu.com [10.167.250.3]) by song.cn.fujitsu.com (Postfix) with ESMTP id 2389817008E; Thu, 9 Feb 2012 11:20:45 +0800 (CST) Received: from mailserver.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id q193Khkh000323; Thu, 9 Feb 2012 11:20:44 +0800 Received: from [10.167.225.226] ([10.167.225.226]) by mailserver.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.1FP4) with ESMTP id 2012020911191292-576862 ; Thu, 9 Feb 2012 11:19:12 +0800 Message-ID: <4F333C53.8090609@cn.fujitsu.com> Date: Thu, 09 Feb 2012 11:24:03 +0800 From: Wen Congyang User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.9) Gecko/20100413 Fedora/3.0.4-2.fc13 Thunderbird/3.0.4 MIME-Version: 1.0 To: qemu-devel , Jan Kiszka , Dave Anderson , HATAYAMA Daisuke , Luiz Capitulino , Eric Blake References: <4F333AAA.1070601@cn.fujitsu.com> In-Reply-To: <4F333AAA.1070601@cn.fujitsu.com> X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.1FP4|July 25, 2010) at 2012-02-09 11:19:12, Serialize by Router on mailserver/fnst(Release 8.5.1FP4|July 25, 2010) at 2012-02-09 11:19:16, Serialize complete at 2012-02-09 11:19:16 X-detected-operating-system: by eggs.gnu.org: FreeBSD 6.x (1) X-Received-From: 222.73.24.84 Subject: [Qemu-devel] [RFC][PATCH 06/16 v6] target-i386: Add API to write elf notes to core file X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The core file contains register's value. These APIs write registers to core file, and them will be called in the following patch. Signed-off-by: Wen Congyang --- cpu-all.h | 6 + target-i386/arch-dump.c | 243 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 249 insertions(+), 0 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index 4cd7fbb..efb5ba3 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -526,8 +526,14 @@ int cpu_memory_rw_debug(CPUState *env, target_ulong addr, #if defined(TARGET_I386) void cpu_get_memory_mapping(MemoryMappingList *list, CPUState *env); +int cpu_write_elf64_note(int fd, CPUState *env, int cpuid, + target_phys_addr_t *offset); +int cpu_write_elf32_note(int fd, CPUState *env, int cpuid, + target_phys_addr_t *offset); #else #define cpu_get_memory_mapping(list, env) +#define cpu_write_elf64_note(fd, env, cpuid, offset) ({ -1; }) +#define cpu_write_elf32_note(fd, env, cpuid, offset) ({ -1; }) #endif #endif /* CPU_ALL_H */ diff --git a/target-i386/arch-dump.c b/target-i386/arch-dump.c index 2e921c7..4c0ff77 100644 --- a/target-i386/arch-dump.c +++ b/target-i386/arch-dump.c @@ -11,8 +11,11 @@ * */ +#include + #include "cpu.h" #include "cpu-all.h" +#include "monitor.h" /* PAE Paging or IA-32e Paging */ static void walk_pte(MemoryMappingList *list, target_phys_addr_t pte_start_addr, @@ -252,3 +255,243 @@ void cpu_get_memory_mapping(MemoryMappingList *list, CPUState *env) walk_pde2(list, pde_addr, env->a20_mask, pse); } } + +#ifdef TARGET_X86_64 +typedef struct { + target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10; + target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax; + target_ulong rip, cs, eflags; + target_ulong rsp, ss; + target_ulong fs_base, gs_base; + target_ulong ds, es, fs, gs; +} x86_64_user_regs_struct; + +static int x86_64_write_elf64_note(int fd, CPUState *env, int id, + target_phys_addr_t *offset) +{ + x86_64_user_regs_struct regs; + Elf64_Nhdr *note; + char *buf; + int descsz, note_size, name_size = 5; + const char *name = "CORE"; + int ret; + + regs.r15 = env->regs[15]; + regs.r14 = env->regs[14]; + regs.r13 = env->regs[13]; + regs.r12 = env->regs[12]; + regs.r11 = env->regs[11]; + regs.r10 = env->regs[10]; + regs.r9 = env->regs[9]; + regs.r8 = env->regs[8]; + regs.rbp = env->regs[R_EBP]; + regs.rsp = env->regs[R_ESP]; + regs.rdi = env->regs[R_EDI]; + regs.rsi = env->regs[R_ESI]; + regs.rdx = env->regs[R_EDX]; + regs.rcx = env->regs[R_ECX]; + regs.rbx = env->regs[R_EBX]; + regs.rax = env->regs[R_EAX]; + regs.rip = env->eip; + regs.eflags = env->eflags; + + regs.orig_rax = 0; /* FIXME */ + regs.cs = env->segs[R_CS].selector; + regs.ss = env->segs[R_SS].selector; + regs.fs_base = env->segs[R_FS].base; + regs.gs_base = env->segs[R_GS].base; + regs.ds = env->segs[R_DS].selector; + regs.es = env->segs[R_ES].selector; + regs.fs = env->segs[R_FS].selector; + regs.gs = env->segs[R_GS].selector; + + descsz = 336; /* sizeof(prstatus_t) is 336 on x86_64 box */ + note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 + + (descsz + 3) / 4) * 4; + note = g_malloc(note_size); + + memset(note, 0, note_size); + note->n_namesz = cpu_to_le32(name_size); + note->n_descsz = cpu_to_le32(descsz); + note->n_type = cpu_to_le32(NT_PRSTATUS); + buf = (char *)note; + buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4; + memcpy(buf, name, name_size); + buf += ((name_size + 3) / 4) * 4; + memcpy(buf + 32, &id, 4); /* pr_pid */ + buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong); + memcpy(buf, ®s, sizeof(x86_64_user_regs_struct)); + + lseek(fd, *offset, SEEK_SET); + ret = write(fd, note, note_size); + g_free(note); + if (ret < 0) { + return -1; + } + + *offset += note_size; + + return 0; +} +#endif + +typedef struct { + uint32_t ebx, ecx, edx, esi, edi, ebp, eax; + unsigned short ds, __ds, es, __es; + unsigned short fs, __fs, gs, __gs; + uint32_t orig_eax, eip; + unsigned short cs, __cs; + uint32_t eflags, esp; + unsigned short ss, __ss; +} x86_user_regs_struct; + +static int x86_write_elf64_note(int fd, CPUState *env, int id, + target_phys_addr_t *offset) +{ + x86_user_regs_struct regs; + Elf64_Nhdr *note; + char *buf; + int descsz, note_size, name_size = 5; + const char *name = "CORE"; + int ret; + + regs.ebp = env->regs[R_EBP] & 0xffffffff; + regs.esp = env->regs[R_ESP] & 0xffffffff; + regs.edi = env->regs[R_EDI] & 0xffffffff; + regs.esi = env->regs[R_ESI] & 0xffffffff; + regs.edx = env->regs[R_EDX] & 0xffffffff; + regs.ecx = env->regs[R_ECX] & 0xffffffff; + regs.ebx = env->regs[R_EBX] & 0xffffffff; + regs.eax = env->regs[R_EAX] & 0xffffffff; + regs.eip = env->eip & 0xffffffff; + regs.eflags = env->eflags & 0xffffffff; + + regs.cs = env->segs[R_CS].selector; + regs.__cs = 0; + regs.ss = env->segs[R_SS].selector; + regs.__ss = 0; + regs.ds = env->segs[R_DS].selector; + regs.__ds = 0; + regs.es = env->segs[R_ES].selector; + regs.__es = 0; + regs.fs = env->segs[R_FS].selector; + regs.__fs = 0; + regs.gs = env->segs[R_GS].selector; + regs.__gs = 0; + + descsz = 144; /* sizeof(prstatus_t) is 144 on x86 box */ + note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 + + (descsz + 3) / 4) * 4; + note = g_malloc(note_size); + + memset(note, 0, note_size); + note->n_namesz = cpu_to_le32(name_size); + note->n_descsz = cpu_to_le32(descsz); + note->n_type = cpu_to_le32(NT_PRSTATUS); + buf = (char *)note; + buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4; + memcpy(buf, name, name_size); + buf += ((name_size + 3) / 4) * 4; + memcpy(buf + 24, &id, 4); /* pr_pid */ + buf += descsz - sizeof(x86_user_regs_struct)-4; + memcpy(buf, ®s, sizeof(x86_user_regs_struct)); + + lseek(fd, *offset, SEEK_SET); + ret = write(fd, note, note_size); + g_free(note); + if (ret < 0) { + return -1; + } + + *offset += note_size; + + return 0; +} + +static int x86_write_elf32_note(int fd, CPUState *env, int id, + target_phys_addr_t *offset) +{ + x86_user_regs_struct regs; + Elf32_Nhdr *note; + char *buf; + int descsz, note_size, name_size = 5; + const char *name = "CORE"; + int ret; + + regs.ebp = env->regs[R_EBP] & 0xffffffff; + regs.esp = env->regs[R_ESP] & 0xffffffff; + regs.edi = env->regs[R_EDI] & 0xffffffff; + regs.esi = env->regs[R_ESI] & 0xffffffff; + regs.edx = env->regs[R_EDX] & 0xffffffff; + regs.ecx = env->regs[R_ECX] & 0xffffffff; + regs.ebx = env->regs[R_EBX] & 0xffffffff; + regs.eax = env->regs[R_EAX] & 0xffffffff; + regs.eip = env->eip & 0xffffffff; + regs.eflags = env->eflags & 0xffffffff; + + regs.cs = env->segs[R_CS].selector; + regs.__cs = 0; + regs.ss = env->segs[R_SS].selector; + regs.__ss = 0; + regs.ds = env->segs[R_DS].selector; + regs.__ds = 0; + regs.es = env->segs[R_ES].selector; + regs.__es = 0; + regs.fs = env->segs[R_FS].selector; + regs.__fs = 0; + regs.gs = env->segs[R_GS].selector; + regs.__gs = 0; + + descsz = 144; /* sizeof(prstatus_t) is 144 on x86 box */ + note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 + + (descsz + 3) / 4) * 4; + note = g_malloc(note_size); + + memset(note, 0, note_size); + note->n_namesz = cpu_to_le32(name_size); + note->n_descsz = cpu_to_le32(descsz); + note->n_type = cpu_to_le32(NT_PRSTATUS); + buf = (char *)note; + buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4; + memcpy(buf, name, name_size); + buf += ((name_size + 3) / 4) * 4; + memcpy(buf + 24, &id, 4); /* pr_pid */ + buf += descsz - sizeof(x86_user_regs_struct)-4; + memcpy(buf, ®s, sizeof(x86_user_regs_struct)); + + lseek(fd, *offset, SEEK_SET); + ret = write(fd, note, note_size); + g_free(note); + if (ret < 0) { + return -1; + } + + *offset += note_size; + + return 0; +} + +int cpu_write_elf64_note(int fd, CPUState *env, int cpuid, + target_phys_addr_t *offset) +{ + int ret; +#ifdef TARGET_X86_64 + bool lma = !!(first_cpu->hflags & HF_LMA_MASK); + + if (lma) { + ret = x86_64_write_elf64_note(fd, env, cpuid, offset); + } else { +#endif + ret = x86_write_elf64_note(fd, env, cpuid, offset); +#ifdef TARGET_X86_64 + } +#endif + + return ret; +} + +int cpu_write_elf32_note(int fd, CPUState *env, int cpuid, + target_phys_addr_t *offset) +{ + return x86_write_elf32_note(fd, env, cpuid, offset); +}