From patchwork Wed Feb 8 12:16:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bastian Hecht X-Patchwork-Id: 140131 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DC49AB6F98 for ; Wed, 8 Feb 2012 23:19:16 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Rv6T7-0001xS-Rg; Wed, 08 Feb 2012 12:17:49 +0000 Received: from mail-ee0-f49.google.com ([74.125.83.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Rv6Sm-0001u2-VP for linux-mtd@lists.infradead.org; Wed, 08 Feb 2012 12:17:31 +0000 Received: by eeke50 with SMTP id e50so165353eek.36 for ; Wed, 08 Feb 2012 04:17:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=iKUwyR2/Z7hCBgGQY4rKOzIok4TGGycNT8CLR8zIZw0=; b=Q291rio2qSrnIXVMTZ4fZpaKVZu1nl4XoyKtzL4lmvBByFgbJGu0PLJX7UjbvZYTEN aT64Uv2jDbi4pXpH2lJat7YBwixv0ehsOoGR36Z5SzAvt79s33GqaBQmla4MrB7bfh/O fJZfJqPerXZuDlEyi4ABGOZOSVHt/NZOut6l0= Received: by 10.213.28.19 with SMTP id k19mr4398264ebc.24.1328703447838; Wed, 08 Feb 2012 04:17:27 -0800 (PST) Received: from localhost.localdomain (i59F746F2.versanet.de. [89.247.70.242]) by mx.google.com with ESMTPS id x4sm4642273eeb.4.2012.02.08.04.17.26 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 08 Feb 2012 04:17:27 -0800 (PST) From: Bastian Hecht To: linux-mtd@lists.infradead.org, linux-sh@vger.kernel.org Subject: [PATCH 6/7] mtd: sh_flctl: Add power management support Date: Wed, 8 Feb 2012 13:16:50 +0100 Message-Id: <1328703411-3452-6-git-send-email-hechtb@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1328703411-3452-1-git-send-email-hechtb@gmail.com> References: <1328703411-3452-1-git-send-email-hechtb@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.83.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (hechtb[at]googlemail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Bastian Hecht , magnus.damm@gmail.com, laurent.pinchart@ideasonboard.com X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add pm support for global suspend/resume as well as for runtime-suspend/-resume. All transactions with the NAND chip require a chip enable signal. So we wrap the runtime_get()/put()s around it. Signed-off-by: Bastian Hecht --- drivers/mtd/nand/sh_flctl.c | 46 +++++++++++++++++++++++++++++++++++++---- include/linux/mtd/sh_flctl.h | 2 + 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c index 70ca40d..a0231dd 100644 --- a/drivers/mtd/nand/sh_flctl.c +++ b/drivers/mtd/nand/sh_flctl.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -515,6 +516,8 @@ static void flctl_cmdfunc(struct mtd_info *mtd, unsigned int command, struct sh_flctl *flctl = mtd_to_flctl(mtd); uint32_t read_cmd = 0; + BUG_ON(!flctl->power); + flctl->read_bytes = 0; if (command != NAND_CMD_PAGEPROG) flctl->index = 0; @@ -681,14 +684,26 @@ read_normal_exit: static void flctl_select_chip(struct mtd_info *mtd, int chipnr) { struct sh_flctl *flctl = mtd_to_flctl(mtd); - uint32_t flcmncr_val = readl(FLCMNCR(flctl)); + uint32_t flcmncr_val; switch (chipnr) { case -1: + flcmncr_val = readl(FLCMNCR(flctl)); flcmncr_val &= ~CE0_ENABLE; writel(flcmncr_val, FLCMNCR(flctl)); + + if (flctl->power) { + pm_runtime_put_sync(&flctl->pdev->dev); + flctl->power = 0; + } break; case 0: + if (!flctl->power) { + pm_runtime_get_sync(&flctl->pdev->dev); + flctl->power = 1; + udelay(1); /* registers read 0 without delay */ + } + flcmncr_val = readl(FLCMNCR(flctl)); flcmncr_val |= CE0_ENABLE; writel(flcmncr_val, FLCMNCR(flctl)); break; @@ -815,6 +830,20 @@ static int flctl_chip_init_tail(struct mtd_info *mtd) return 0; } +static int flctl_reinitialize(struct device *dev) +{ + struct sh_flctl *flctl = dev_get_drvdata(dev); + udelay(1); + flctl_register_init(flctl, flctl->flcmncr_val); + + return 0; +} + +static const struct dev_pm_ops flctl_dev_pm_ops = { + .resume = flctl_reinitialize, + .runtime_resume = flctl_reinitialize, +}; + static int __devinit flctl_probe(struct platform_device *pdev) { struct resource *res; @@ -853,9 +882,13 @@ static int __devinit flctl_probe(struct platform_device *pdev) nand = &flctl->chip; flctl_mtd->priv = nand; flctl->pdev = pdev; + flctl->flcmncr_val = pdata->flcmncr_val; flctl->hwecc = pdata->has_hwecc; flctl->holden = pdata->use_holden; + pm_runtime_enable(&pdev->dev); + pm_runtime_resume(&pdev->dev); + flctl_register_init(flctl, pdata->flcmncr_val); nand->options = NAND_NO_AUTOINCR; @@ -878,20 +911,21 @@ static int __devinit flctl_probe(struct platform_device *pdev) ret = nand_scan_ident(flctl_mtd, 1, NULL); if (ret) - goto err; + goto chip_err; ret = flctl_chip_init_tail(flctl_mtd); if (ret) - goto err; + goto chip_err; ret = nand_scan_tail(flctl_mtd); if (ret) - goto err; + goto chip_err; mtd_device_register(flctl_mtd, pdata->parts, pdata->nr_parts); return 0; - +chip_err: + pm_runtime_disable(&pdev->dev); err: kfree(flctl); return ret; @@ -902,6 +936,7 @@ static int __devexit flctl_remove(struct platform_device *pdev) struct sh_flctl *flctl = platform_get_drvdata(pdev); nand_release(&flctl->mtd); + pm_runtime_disable(&pdev->dev); kfree(flctl); return 0; @@ -912,6 +947,7 @@ static struct platform_driver flctl_driver = { .driver = { .name = "sh_flctl", .owner = THIS_MODULE, + .pm = &flctl_dev_pm_ops, }, }; diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h index fc77017..bdef1b9 100644 --- a/include/linux/mtd/sh_flctl.h +++ b/include/linux/mtd/sh_flctl.h @@ -145,9 +145,11 @@ struct sh_flctl { int hwecc_cant_correct[4]; + unsigned long flcmncr_val; unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */ unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */ unsigned holden:1; /* Hardware has FLHOLDCR and HOLDEN is set */ + unsigned power:1; /* RTPM flag */ }; struct sh_flctl_platform_data {