[U-Boot,4/4] Added NAND flash pin configuration

Submitted by Robert Deliën on Feb. 7, 2012, 4:52 p.m.

Details

Message ID 1328633555-27538-5-git-send-email-robert@delien.nl
State Superseded
Delegated to: Stefano Babic
Headers show

Commit Message

Robert Deliën Feb. 7, 2012, 4:52 p.m.
From: Robert Delien <robert@delien.nl>


Signed-off-by: Robert Delien <robert@delien.nl>
---
 board/freescale/mx28evk/iomux.c |   24 ++++++++++++++++++++++++
 1 files changed, 24 insertions(+), 0 deletions(-)

Comments

Marek Vasut Feb. 7, 2012, 5:28 p.m.
> From: Robert Delien <robert@delien.nl>

Description of the patches won't hurt ;-)

Otherwise, these patches are Fabios ... so he'll ack/nak them

M
> 
> 
> Signed-off-by: Robert Delien <robert@delien.nl>
> ---
>  board/freescale/mx28evk/iomux.c |   24 ++++++++++++++++++++++++
>  1 files changed, 24 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx28evk/iomux.c
> b/board/freescale/mx28evk/iomux.c index d6f9d0a..781f36d 100644
> --- a/board/freescale/mx28evk/iomux.c
> +++ b/board/freescale/mx28evk/iomux.c
> @@ -29,6 +29,7 @@
>  #define	MUX_CONFIG_SSP1	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
>  #define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
>  #define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
> +#define	MUX_CONFIG_NAND	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
> 
>  const iomux_cfg_t iomux_setup[] = {
>  	/* Debug UART (DUART) */
> @@ -77,6 +78,29 @@ const iomux_cfg_t iomux_setup[] = {
>  	MX28_PAD_GPMI_ALE__GPIO_0_26 | MXS_PAD_3V3,
>  	MX28_PAD_GPMI_CE1N__GPIO_0_17 | MXS_PAD_3V3,
>  	MX28_PAD_GPMI_CE0N__GPIO_0_16 | MXS_PAD_3V3,
> +#else
> +	/* On-board NAND flash ZIF-socket  */
> +	MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_RDN__GPMI_RDN |
> +		MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_PULLUP,
> +	MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_RDY1__GPMI_READY1 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_CE1N__GPMI_CE1N | MUX_CONFIG_NAND,
> +	/* NAND Write-protect */
> +	MX28_PAD_GPMI_RESETN__GPIO_0_28 | MXS_PAD_3V3,
> +	/* Not used for NAND flash */
> +	MX28_PAD_PWM4__GPIO_3_29 | MXS_PAD_3V3,
>  #endif /* nCONFIG_CMD_NAND */
>  	/* FEC0 */
>  	MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
Matthias Fuchs Feb. 10, 2012, 12:30 p.m.
Do you plan to post a patch to enable NAND on the EVK as well?
That shouldn't be a big deal.

Matthias

On 07.02.2012 17:52, robert@delien.nl wrote:
> From: Robert Delien <robert@delien.nl>
> 
> 
> Signed-off-by: Robert Delien <robert@delien.nl>
> ---
>  board/freescale/mx28evk/iomux.c |   24 ++++++++++++++++++++++++
>  1 files changed, 24 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
> index d6f9d0a..781f36d 100644
> --- a/board/freescale/mx28evk/iomux.c
> +++ b/board/freescale/mx28evk/iomux.c
> @@ -29,6 +29,7 @@
>  #define	MUX_CONFIG_SSP1	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
>  #define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
>  #define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
> +#define	MUX_CONFIG_NAND	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
>  
>  const iomux_cfg_t iomux_setup[] = {
>  	/* Debug UART (DUART) */
> @@ -77,6 +78,29 @@ const iomux_cfg_t iomux_setup[] = {
>  	MX28_PAD_GPMI_ALE__GPIO_0_26 | MXS_PAD_3V3,
>  	MX28_PAD_GPMI_CE1N__GPIO_0_17 | MXS_PAD_3V3,
>  	MX28_PAD_GPMI_CE0N__GPIO_0_16 | MXS_PAD_3V3,
> +#else
> +	/* On-board NAND flash ZIF-socket  */
> +	MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_RDN__GPMI_RDN |
> +		MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_PULLUP,
> +	MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_RDY1__GPMI_READY1 | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_NAND,
> +	MX28_PAD_GPMI_CE1N__GPMI_CE1N | MUX_CONFIG_NAND,
> +	/* NAND Write-protect */
> +	MX28_PAD_GPMI_RESETN__GPIO_0_28 | MXS_PAD_3V3,
> +	/* Not used for NAND flash */
> +	MX28_PAD_PWM4__GPIO_3_29 | MXS_PAD_3V3,
>  #endif /* nCONFIG_CMD_NAND */
>  	/* FEC0 */
>  	MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
Robert Deliën Feb. 10, 2012, 12:42 p.m.
> Do you plan to post a patch to enable NAND on the EVK as well?

Yes, I do. It's all tested and working in my workspace. But the first
samples of our own board have arrived a couple of days ago and I'm
currently in the process of bringing it up and that has priority over
everything else, hence the silence.

I've got I2C, UARTs both MMC slots and USB working as well.

> That shouldn't be a big deal.

It was of 5 minute job, 1 of which was compile-time. Unfortunately
making a patch and reworking all comments is not.
Matthias Fuchs Feb. 10, 2012, 12:51 p.m.
On 10.02.2012 13:42, Robert Deliën wrote:
>> Do you plan to post a patch to enable NAND on the EVK as well?
> 
> Yes, I do. It's all tested and working in my workspace. But the first
> samples of our own board have arrived a couple of days ago and I'm
> currently in the process of bringing it up and that has priority over
> everything else, hence the silence.
> 
> I've got I2C, UARTs both MMC slots and USB working as well.
> 
>> That shouldn't be a big deal.
> 
> It was of 5 minute job, 1 of which was compile-time. Unfortunately
> making a patch and reworking all comments is not.
So I can lean back ...

Matthias
Robert Deliën Feb. 10, 2012, 12:53 p.m.
> So I can lean back ...

I can even send you a patch of what I have, if that helps you out...
Robert Deliën Feb. 15, 2012, 2:51 p.m.
> Do you plan to post a patch to enable NAND on the EVK as well?

No, I'm afraid not anymore.

> That shouldn't be a big deal.

The patch isn't, but getting it accepted is.

Patch hide | download patch | download mbox

diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index d6f9d0a..781f36d 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -29,6 +29,7 @@ 
 #define	MUX_CONFIG_SSP1	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
 #define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
 #define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#define	MUX_CONFIG_NAND	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
 
 const iomux_cfg_t iomux_setup[] = {
 	/* Debug UART (DUART) */
@@ -77,6 +78,29 @@  const iomux_cfg_t iomux_setup[] = {
 	MX28_PAD_GPMI_ALE__GPIO_0_26 | MXS_PAD_3V3,
 	MX28_PAD_GPMI_CE1N__GPIO_0_17 | MXS_PAD_3V3,
 	MX28_PAD_GPMI_CE0N__GPIO_0_16 | MXS_PAD_3V3,
+#else
+	/* On-board NAND flash ZIF-socket  */
+	MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_RDN__GPMI_RDN |
+		MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_PULLUP,
+	MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_RDY1__GPMI_READY1 | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_NAND,
+	MX28_PAD_GPMI_CE1N__GPMI_CE1N | MUX_CONFIG_NAND,
+	/* NAND Write-protect */
+	MX28_PAD_GPMI_RESETN__GPIO_0_28 | MXS_PAD_3V3,
+	/* Not used for NAND flash */
+	MX28_PAD_PWM4__GPIO_3_29 | MXS_PAD_3V3,
 #endif /* nCONFIG_CMD_NAND */
 	/* FEC0 */
 	MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,