Patchwork powerpc/wsp: Permanently enable PCI class code workaround

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Submitter Benjamin Herrenschmidt
Date Feb. 5, 2012, 11:50 p.m.
Message ID <1328485804.30631.10.camel@pasglop>
Download mbox | patch
Permalink /patch/139669/
State Accepted, archived
Headers show

Comments

Benjamin Herrenschmidt - Feb. 5, 2012, 11:50 p.m.
It appears that on the Chroma card, the class code of the root
complex is still wrong even on DD2 or later chips. This could
be a firmware issue, but that breaks resource allocation so let's
unconditionally fix it up.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
 arch/powerpc/platforms/wsp/wsp_pci.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
Stephen Rothwell - Feb. 6, 2012, 12:30 a.m.
Hi Ben,

Just a small grammar correction:

On Mon, 06 Feb 2012 10:50:04 +1100 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> -	/* WSP DD1 has a bogus class code by default in the PCI-E
> -	 * root complex's built-in P2P bridge */
> +	/*
> +	 * Some WSP variants  has a bogus class code by default in the PCI-E
                             ^^^^
have

Patch

diff --git a/arch/powerpc/platforms/wsp/wsp_pci.c b/arch/powerpc/platforms/wsp/wsp_pci.c
index e0262cd..d24b3ac 100644
--- a/arch/powerpc/platforms/wsp/wsp_pci.c
+++ b/arch/powerpc/platforms/wsp/wsp_pci.c
@@ -468,15 +468,15 @@  static void __init wsp_pcie_configure_hw(struct pci_controller *hose)
 #define DUMP_REG(x) \
 	pr_debug("%-30s : 0x%016llx\n", #x, in_be64(hose->cfg_data + x))
 
-#ifdef CONFIG_WSP_DD1_WORKAROUND_BAD_PCIE_CLASS
-	/* WSP DD1 has a bogus class code by default in the PCI-E
-	 * root complex's built-in P2P bridge */
+	/*
+	 * Some WSP variants  has a bogus class code by default in the PCI-E
+	 * root complex's built-in P2P bridge
+	 */
 	val = in_be64(hose->cfg_data + PCIE_REG_SYS_CFG1);
 	pr_debug("PCI-E SYS_CFG1 : 0x%llx\n", val);
 	out_be64(hose->cfg_data + PCIE_REG_SYS_CFG1,
 		 (val & ~PCIE_REG_SYS_CFG1_CLASS_CODE) | (PCI_CLASS_BRIDGE_PCI << 8));
 	pr_debug("PCI-E SYS_CFG1 : 0x%llx\n", in_be64(hose->cfg_data + PCIE_REG_SYS_CFG1));
-#endif /* CONFIG_WSP_DD1_WORKAROUND_BAD_PCIE_CLASS */
 
 #ifdef CONFIG_WSP_DD1_WORKAROUND_DD1_TCE_BUGS
 	/* XXX Disable TCE caching, it doesn't work on DD1 */