From patchwork Sat Feb 4 14:39:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?6Zmz6Z+L5Lu7?= X-Patchwork-Id: 139594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 31423B7243 for ; Sun, 5 Feb 2012 09:10:11 +1100 (EST) Received: from localhost ([::1]:54981 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rtno1-0008II-8K for incoming@patchwork.ozlabs.org; Sat, 04 Feb 2012 17:10:01 -0500 Received: from eggs.gnu.org ([140.186.70.92]:43785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RtgmF-0002HU-DP for qemu-devel@nongnu.org; Sat, 04 Feb 2012 09:39:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RtgmD-00069W-4V for qemu-devel@nongnu.org; Sat, 04 Feb 2012 09:39:43 -0500 Received: from csmailer.cs.nctu.edu.tw ([140.113.235.130]:30370) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rtgm9-00068X-Lu; Sat, 04 Feb 2012 09:39:41 -0500 Received: from csmailer.cs.nctu.edu.tw (localhost [127.0.0.1]) by csmailer.cs.nctu.edu.tw (Postfix) with ESMTP id BC231881; Sat, 4 Feb 2012 22:36:12 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=cs.nctu.edu.tw; h=date :from:to:cc:subject:message-id:mime-version:content-type :content-transfer-encoding; s=rsa1024; bh=iBJ/gIa+U/pgPTmGiVR/jn SeQMI=; b=dHAmiZC4tzEf6/XEo6JAtQ8AyVuZGF538bvHwGXJommGJZBsmdZGGM YJiiJ1E+PORSXwPEcYedHjDd4v92h/IpziR1YQdBdSt5CYqOlPovda754S9p1AxL vShdqzjWqXyTlM9rKBUMLlgoqYPvp4VAfrTb5gNCJT0MaF0FJaZ9U= Received: from alumni.cs.nctu.edu.tw (alumni.cs.nctu.edu.tw [140.113.235.116]) by csmailer.cs.nctu.edu.tw (Postfix) with ESMTP id 9C4AB880; Sat, 4 Feb 2012 22:36:12 +0800 (CST) Received: (from chenwj@localhost) by alumni.cs.nctu.edu.tw (8.14.4/8.14.4/Submit) id q14EdOcq003837; Sat, 4 Feb 2012 22:39:24 +0800 (CST) (envelope-from chenwj) Date: Sat, 4 Feb 2012 22:39:24 +0800 From: =?utf-8?B?6Zmz6Z+L5Lu7?= To: qemu-devel@nongnu.org Message-ID: <20120204143924.GA554@cs.nctu.edu.tw> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 140.113.235.130 X-Mailman-Approved-At: Sat, 04 Feb 2012 17:09:55 -0500 Cc: qemu-trivial@nongnu.org Subject: [Qemu-devel] [PATCH] cpu-exec.c: Correct comment about this file and indentation cleanup X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Each target use #define marco (in target-xxx/cpu.h) to rename cpu_exec (cpu-exec.c) to cpu_xxx_exec, then defines its own cpu_loop which calls cpu_xxx_exec. So basically, cpu-exec.c is not i386 (only) emulator main execution loop. This patch correctes the comment of this file and does indentation cleanup. Signed-off-by: Chen Wei-Ren (陳韋任) --- cpu-exec.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index a9fa608..f7f19f5 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -1,5 +1,5 @@ /* - * i386 emulator main execution loop + * emulator main execution loop * * Copyright (c) 2003-2005 Fabrice Bellard * @@ -304,7 +304,7 @@ int cpu_exec(CPUState *env) env->hflags2 |= HF2_NMI_MASK; do_interrupt_x86_hardirq(env, EXCP02_NMI, 1); next_tb = 0; - } else if (interrupt_request & CPU_INTERRUPT_MCE) { + } else if (interrupt_request & CPU_INTERRUPT_MCE) { env->interrupt_request &= ~CPU_INTERRUPT_MCE; do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0); next_tb = 0; @@ -390,7 +390,7 @@ int cpu_exec(CPUState *env) next_tb = 0; } } - } + } #elif defined(TARGET_ARM) if (interrupt_request & CPU_INTERRUPT_FIQ && !(env->uncached_cpsr & CPSR_F)) { @@ -429,7 +429,7 @@ int cpu_exec(CPUState *env) { int idx = -1; /* ??? This hard-codes the OSF/1 interrupt levels. */ - switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) { + switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) { case 0 ... 3: if (interrupt_request & CPU_INTERRUPT_HARD) { idx = EXCP_DEV_INTERRUPT; @@ -562,7 +562,7 @@ int cpu_exec(CPUState *env) barrier(); if (likely(!env->exit_request)) { tc_ptr = tb->tc_ptr; - /* execute the generated code */ + /* execute the generated code */ next_tb = tcg_qemu_tb_exec(env, tc_ptr); if ((next_tb & 3) == 2) { /* Instruction counter expired. */