From patchwork Fri Feb 3 18:30:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 139443 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6F7AD104792 for ; Sat, 4 Feb 2012 06:13:22 +1100 (EST) Received: from localhost ([::1]:57566 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RtNub-0008UT-BL for incoming@patchwork.ozlabs.org; Fri, 03 Feb 2012 13:31:05 -0500 Received: from eggs.gnu.org ([140.186.70.92]:56874) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RtNuA-0007ie-Dl for qemu-devel@nongnu.org; Fri, 03 Feb 2012 13:30:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RtNu8-00079F-DZ for qemu-devel@nongnu.org; Fri, 03 Feb 2012 13:30:38 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:42608) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RtNu7-00076x-Ro for qemu-devel@nongnu.org; Fri, 03 Feb 2012 13:30:36 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1RtNu0-0005i8-DH; Fri, 03 Feb 2012 18:30:28 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2012 18:30:25 +0000 Message-Id: <1328293828-21921-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1328293828-21921-1-git-send-email-peter.maydell@linaro.org> References: <1328293828-21921-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , patches@linaro.org Subject: [Qemu-devel] [PATCH v4 4/7] hw/vexpress.c: Factor out daughterboard-specific initialization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Factor out daughterboard specifics into a data structure and daughterboard initialization function, in preparation for adding vexpress-a15 support. Signed-off-by: Peter Maydell --- hw/vexpress.c | 118 ++++++++++++++++++++++++++++++++++++++++----------------- 1 files changed, 83 insertions(+), 35 deletions(-) diff --git a/hw/vexpress.c b/hw/vexpress.c index 99a9690..26537f7 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -103,32 +103,43 @@ static target_phys_addr_t motherboard_legacy_map[] = { [VE_USB] = 0x4f000000, }; -static void vexpress_a9_init(ram_addr_t ram_size, - const char *boot_device, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename, const char *cpu_model) +/* Structure defining the peculiarities of a specific daughterboard */ + +typedef struct VEDBoardInfo VEDBoardInfo; + +typedef void DBoardInitFn(const VEDBoardInfo *daughterboard, + ram_addr_t ram_size, + const char *cpu_model, + qemu_irq *pic, uint32_t *proc_id); + +struct VEDBoardInfo { + const target_phys_addr_t *motherboard_map; + target_phys_addr_t loader_start; + DBoardInitFn *init; +}; + +static void a9_daughterboard_init(const VEDBoardInfo *daughterboard, + ram_addr_t ram_size, + const char *cpu_model, + qemu_irq *pic, uint32_t *proc_id) { CPUState *env = NULL; MemoryRegion *sysmem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *lowram = g_new(MemoryRegion, 1); - MemoryRegion *vram = g_new(MemoryRegion, 1); - MemoryRegion *sram = g_new(MemoryRegion, 1); - DeviceState *dev, *sysctl, *pl041; + DeviceState *dev; SysBusDevice *busdev; qemu_irq *irqp; - qemu_irq pic[64]; int n; qemu_irq cpu_irq[4]; - uint32_t proc_id; - uint32_t sys_id; - ram_addr_t low_ram_size, vram_size, sram_size; - target_phys_addr_t *map = motherboard_legacy_map; + ram_addr_t low_ram_size; if (!cpu_model) { cpu_model = "cortex-a9"; } + *proc_id = 0x0c000191; + for (n = 0; n < smp_cpus; n++) { env = cpu_init(cpu_model); if (!env) { @@ -141,7 +152,7 @@ static void vexpress_a9_init(ram_addr_t ram_size, if (ram_size > 0x40000000) { /* 1GB is the maximum the address space permits */ - fprintf(stderr, "vexpress: cannot model more than 1GB RAM\n"); + fprintf(stderr, "vexpress-a9: cannot model more than 1GB RAM\n"); exit(1); } @@ -179,12 +190,58 @@ static void vexpress_a9_init(ram_addr_t ram_size, pic[n] = qdev_get_gpio_in(dev, n); } + /* Daughterboard peripherals : 0x10020000 .. 0x20000000 */ + + /* 0x10020000 PL111 CLCD (daughterboard) */ + sysbus_create_simple("pl111", 0x10020000, pic[44]); + + /* 0x10060000 AXI RAM */ + /* 0x100e0000 PL341 Dynamic Memory Controller */ + /* 0x100e1000 PL354 Static Memory Controller */ + /* 0x100e2000 System Configuration Controller */ + + sysbus_create_simple("sp804", 0x100e4000, pic[48]); + /* 0x100e5000 SP805 Watchdog module */ + /* 0x100e6000 BP147 TrustZone Protection Controller */ + /* 0x100e9000 PL301 'Fast' AXI matrix */ + /* 0x100ea000 PL301 'Slow' AXI matrix */ + /* 0x100ec000 TrustZone Address Space Controller */ + /* 0x10200000 CoreSight debug APB */ + /* 0x1e00a000 PL310 L2 Cache Controller */ + sysbus_create_varargs("l2x0", 0x1e00a000, NULL); +} + +static const VEDBoardInfo a9_daughterboard = { + .motherboard_map = motherboard_legacy_map, + .loader_start = 0x60000000, + .init = a9_daughterboard_init, +}; + +static void vexpress_common_init(const VEDBoardInfo *daughterboard, + ram_addr_t ram_size, + const char *boot_device, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename, + const char *cpu_model) +{ + DeviceState *dev, *sysctl, *pl041; + qemu_irq pic[64]; + uint32_t proc_id; + uint32_t sys_id; + ram_addr_t vram_size, sram_size; + MemoryRegion *sysmem = get_system_memory(); + MemoryRegion *vram = g_new(MemoryRegion, 1); + MemoryRegion *sram = g_new(MemoryRegion, 1); + const target_phys_addr_t *map = daughterboard->motherboard_map; + + daughterboard->init(daughterboard, ram_size, cpu_model, pic, &proc_id); + /* Motherboard peripherals: the wiring is the same but the * addresses vary between the legacy and A-Series memory maps. */ sys_id = 0x1190f500; - proc_id = 0x0c000191; sysctl = qdev_create(NULL, "realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); @@ -227,26 +284,6 @@ static void vexpress_a9_init(ram_addr_t ram_size, /* VE_CLCD: not modelled (we use the daughterboard CLCD only) */ - /* Daughterboard peripherals : 0x10020000 .. 0x20000000 */ - - /* 0x10020000 PL111 CLCD (daughterboard) */ - sysbus_create_simple("pl111", 0x10020000, pic[44]); - - /* 0x10060000 AXI RAM */ - /* 0x100e0000 PL341 Dynamic Memory Controller */ - /* 0x100e1000 PL354 Static Memory Controller */ - /* 0x100e2000 System Configuration Controller */ - - sysbus_create_simple("sp804", 0x100e4000, pic[48]); - /* 0x100e5000 SP805 Watchdog module */ - /* 0x100e6000 BP147 TrustZone Protection Controller */ - /* 0x100e9000 PL301 'Fast' AXI matrix */ - /* 0x100ea000 PL301 'Slow' AXI matrix */ - /* 0x100ec000 TrustZone Address Space Controller */ - /* 0x10200000 CoreSight debug APB */ - /* 0x1e00a000 PL310 L2 Cache Controller */ - sysbus_create_varargs("l2x0", 0x1e00a000, NULL); - /* VE_NORFLASH0: not modelled */ /* VE_NORFLASH0ALIAS: not modelled */ /* VE_NORFLASH1: not modelled */ @@ -276,12 +313,23 @@ static void vexpress_a9_init(ram_addr_t ram_size, vexpress_binfo.initrd_filename = initrd_filename; vexpress_binfo.nb_cpus = smp_cpus; vexpress_binfo.board_id = VEXPRESS_BOARD_ID; - vexpress_binfo.loader_start = 0x60000000; + vexpress_binfo.loader_start = daughterboard->loader_start; vexpress_binfo.smp_loader_start = map[VE_SRAM]; vexpress_binfo.smp_bootreg_addr = map[VE_SYSREGS] + 0x30; arm_load_kernel(first_cpu, &vexpress_binfo); } +static void vexpress_a9_init(ram_addr_t ram_size, + const char *boot_device, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename, + const char *cpu_model) +{ + vexpress_common_init(&a9_daughterboard, + ram_size, boot_device, kernel_filename, + kernel_cmdline, initrd_filename, cpu_model); +} static QEMUMachine vexpress_a9_machine = { .name = "vexpress-a9",