@@ -300,6 +300,17 @@ static const MemoryRegionOps pit_ioport_ops = {
.old_portio = pit_portio
};
+static void pit_post_load(PITCommonState *s)
+{
+ PITChannelState *sc = &s->channels[0];
+
+ if (sc->next_transition_time != -1) {
+ qemu_mod_timer(sc->irq_timer, sc->next_transition_time);
+ } else {
+ qemu_del_timer(sc->irq_timer);
+ }
+}
+
static int pit_initfn(PITCommonState *pit)
{
PITChannelState *s;
@@ -323,6 +334,7 @@ static void pit_class_init(ObjectClass *klass, void *data)
k->init = pit_initfn;
k->set_channel_gate = pit_set_channel_gate;
k->get_channel_info = pit_get_channel_info_common;
+ k->post_load = pit_post_load;
}
static DeviceInfo pit_info = {
@@ -234,9 +234,8 @@ static int pit_load_old(QEMUFile *f, void *opaque, int version_id)
qemu_get_8s(f, &s->gate);
s->count_load_time = qemu_get_be64(f);
s->irq_disabled = 0;
- if (s->irq_timer) {
+ if (i == 0) {
s->next_transition_time = qemu_get_be64(f);
- qemu_get_timer(f, s->irq_timer);
}
}
return 0;
@@ -275,7 +274,8 @@ static const VMStateDescription vmstate_pit_common = {
VMSTATE_UINT32_V(channels[0].irq_disabled, PITCommonState, 3),
VMSTATE_STRUCT_ARRAY(channels, PITCommonState, 3, 2,
vmstate_pit_channel, PITChannelState),
- VMSTATE_TIMER(channels[0].irq_timer, PITCommonState),
+ VMSTATE_INT64(channels[0].next_transition_time,
+ PITCommonState), /* formerly irq_timer */
VMSTATE_END_OF_LIST()
}
};
Same as for the APIC: To enable migration between accelerated and non-accelerated models, we need to arm the channel 0 timer only inside the emulated PIT model. The common code just saves/restores that timer to the the next_transition_time field. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> --- hw/i8254.c | 12 ++++++++++++ hw/i8254_common.c | 6 +++--- 2 files changed, 15 insertions(+), 3 deletions(-)