Patchwork cpu:msr: fixed errors for checking SMRR MSR registers

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Submitter Alex Hung
Date Jan. 31, 2012, 2:07 a.m.
Message ID <1327975644-16971-1-git-send-email-alex.hung@canonical.com>
Download mbox | patch
Permalink /patch/138675/
State Accepted
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Comments

Alex Hung - Jan. 31, 2012, 2:07 a.m.
SMRR_PHYSBASE boundary check is aligned to 8MB.

SMRR_PHYSMASK register is changed from 0x1f2 to 0x1f3.

Signed-off-by: Alex Hung <alex.hung@canonical.com>
---
 src/cpu/msr/msr.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
Keng-Yu Lin - Jan. 31, 2012, 6:45 a.m.
On Tue, Jan 31, 2012 at 10:07 AM, Alex Hung <alex.hung@canonical.com> wrote:
> SMRR_PHYSBASE boundary check is aligned to 8MB.
>
> SMRR_PHYSMASK register is changed from 0x1f2 to 0x1f3.
>
> Signed-off-by: Alex Hung <alex.hung@canonical.com>
> ---
>  src/cpu/msr/msr.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index 06a756f..f84c7a6 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -194,14 +194,14 @@ static int msr_smrr(fwts_framework *fw)
>                        if (fwts_cpu_readmsr(0, 0x1f2, &val) == FWTS_OK) {
>                                uint64_t physbase = val & 0xfffff000;
>                                uint64_t type = val & 7;
> -                               if ((physbase % 0x7fffff) != 0)
> +                               if ((physbase & 0x7fffff) != 0)
>                                        fwts_failed(fw, LOG_LEVEL_HIGH, "MSRSMRR_PHYSBASE8MBBoundary",
>                                                "SMRR: SMRR_PHYSBASE is NOT on an 8MB boundary: %llx.", (unsigned long long)physbase);
>                                if (type != 6)
>                                        fwts_failed(fw, LOG_LEVEL_HIGH, "MSRSMRR_TYPE",
>                                                "SMRR: SMRR_TYPE is 0x%x, should be 0x6 (Write-Back).", (int)type);
>                        }
> -                       if (fwts_cpu_readmsr(0, 0x1f2, &val) == FWTS_OK) {
> +                       if (fwts_cpu_readmsr(0, 0x1f3, &val) == FWTS_OK) {
>                                uint64_t physmask = val & 0xfffff000;
>                                uint64_t valid = (val >> 11) & 1;
>
> --
> 1.7.5.4
>
>
Acked-by: Keng-Yu Lin <kengyu@canonical.com>
Colin King - Jan. 31, 2012, 9:19 a.m.
On 31/01/12 02:07, Alex Hung wrote:
> SMRR_PHYSBASE boundary check is aligned to 8MB.
>
> SMRR_PHYSMASK register is changed from 0x1f2 to 0x1f3.
>
> Signed-off-by: Alex Hung<alex.hung@canonical.com>
> ---
>   src/cpu/msr/msr.c |    4 ++--
>   1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index 06a756f..f84c7a6 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -194,14 +194,14 @@ static int msr_smrr(fwts_framework *fw)
>   			if (fwts_cpu_readmsr(0, 0x1f2,&val) == FWTS_OK) {
>   				uint64_t physbase = val&  0xfffff000;
>   				uint64_t type = val&  7;
> -				if ((physbase % 0x7fffff) != 0)
> +				if ((physbase&  0x7fffff) != 0)
>   					fwts_failed(fw, LOG_LEVEL_HIGH, "MSRSMRR_PHYSBASE8MBBoundary",
>   						"SMRR: SMRR_PHYSBASE is NOT on an 8MB boundary: %llx.", (unsigned long long)physbase);
>   				if (type != 6)
>   					fwts_failed(fw, LOG_LEVEL_HIGH, "MSRSMRR_TYPE",
>   						"SMRR: SMRR_TYPE is 0x%x, should be 0x6 (Write-Back).", (int)type);
>   			}
> -			if (fwts_cpu_readmsr(0, 0x1f2,&val) == FWTS_OK) {
> +			if (fwts_cpu_readmsr(0, 0x1f3,&val) == FWTS_OK) {
>   				uint64_t physmask = val&  0xfffff000;
>   				uint64_t valid = (val>>  11)&  1;
>
Thanks for spotting and fixing this Alex.

Acked-by: Colin King <colin.king@canonical.com>
Keng-Yu Lin - Jan. 31, 2012, 9:38 a.m.
On Tue, Jan 31, 2012 at 5:19 PM, Colin Ian King
<colin.king@canonical.com> wrote:
> On 31/01/12 02:07, Alex Hung wrote:
>>
>> SMRR_PHYSBASE boundary check is aligned to 8MB.
>>
>> SMRR_PHYSMASK register is changed from 0x1f2 to 0x1f3.
>>
>> Signed-off-by: Alex Hung<alex.hung@canonical.com>
>> ---
>>  src/cpu/msr/msr.c |    4 ++--
>>  1 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
>> index 06a756f..f84c7a6 100644
>> --- a/src/cpu/msr/msr.c
>> +++ b/src/cpu/msr/msr.c
>> @@ -194,14 +194,14 @@ static int msr_smrr(fwts_framework *fw)
>>                        if (fwts_cpu_readmsr(0, 0x1f2,&val) == FWTS_OK) {
>>
>>                                uint64_t physbase = val&  0xfffff000;
>>                                uint64_t type = val&  7;
>>
>> -                               if ((physbase % 0x7fffff) != 0)
>> +                               if ((physbase&  0x7fffff) != 0)
>>
>>                                        fwts_failed(fw, LOG_LEVEL_HIGH,
>> "MSRSMRR_PHYSBASE8MBBoundary",
>>                                                "SMRR: SMRR_PHYSBASE is NOT
>> on an 8MB boundary: %llx.", (unsigned long long)physbase);
>>                                if (type != 6)
>>                                        fwts_failed(fw, LOG_LEVEL_HIGH,
>> "MSRSMRR_TYPE",
>>                                                "SMRR: SMRR_TYPE is 0x%x,
>> should be 0x6 (Write-Back).", (int)type);
>>                        }
>> -                       if (fwts_cpu_readmsr(0, 0x1f2,&val) == FWTS_OK) {
>> +                       if (fwts_cpu_readmsr(0, 0x1f3,&val) == FWTS_OK) {
>>                                uint64_t physmask = val&  0xfffff000;
>>
>>                                uint64_t valid = (val>>  11)&  1;
>>
> Thanks for spotting and fixing this Alex.
>
> Acked-by: Colin King <colin.king@canonical.com>
>
>

Applied. Thanks.

Patch

diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
index 06a756f..f84c7a6 100644
--- a/src/cpu/msr/msr.c
+++ b/src/cpu/msr/msr.c
@@ -194,14 +194,14 @@  static int msr_smrr(fwts_framework *fw)
 			if (fwts_cpu_readmsr(0, 0x1f2, &val) == FWTS_OK) {
 				uint64_t physbase = val & 0xfffff000;
 				uint64_t type = val & 7;
-				if ((physbase % 0x7fffff) != 0)
+				if ((physbase & 0x7fffff) != 0)
 					fwts_failed(fw, LOG_LEVEL_HIGH, "MSRSMRR_PHYSBASE8MBBoundary",
 						"SMRR: SMRR_PHYSBASE is NOT on an 8MB boundary: %llx.", (unsigned long long)physbase);
 				if (type != 6)
 					fwts_failed(fw, LOG_LEVEL_HIGH, "MSRSMRR_TYPE",
 						"SMRR: SMRR_TYPE is 0x%x, should be 0x6 (Write-Back).", (int)type);
 			}
-			if (fwts_cpu_readmsr(0, 0x1f2, &val) == FWTS_OK) {
+			if (fwts_cpu_readmsr(0, 0x1f3, &val) == FWTS_OK) {
 				uint64_t physmask = val & 0xfffff000;
 				uint64_t valid = (val >> 11) & 1;