Patchwork [lra] patch to fix some bugs in LRA for arm

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Submitter Vladimir Makarov
Date Jan. 27, 2012, 7:03 p.m.
Message ID <4F22F518.2030209@redhat.com>
Download mbox | patch
Permalink /patch/138278/
State New
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Comments

Vladimir Makarov - Jan. 27, 2012, 7:03 p.m.
The following patch fixes some bugs in caller-saves pseudo splitting 
found on ARM toolchain.  But ARM bootstrap failure is not fixed yet.

The patch was successfully bootstrapped on x86/x86-64.  Committed as 
rev. 183639.

2012-01-27  Vladimir Makarov <vmakarov@redhat.com>

         * lra-int.h (lra_risky_equiv_subst_p): Rename to
         lra_risky_transformations_p.

         * lra-constraints.c: Ditto.
         (inherit_in_ebb): When splitting pseudo subreg, set up
         lra_risky_transformations_p.  Process subreg of multi-register
         pseudo as input too.

         * lra-assigns.c (setup_live_pseudos_and_spill_after_equiv_moves):
         Rename to setup_live_pseudos_and_spill_after_risky_transforms.

Patch

Index: lra-assigns.c
===================================================================
--- lra-assigns.c	(revision 183637)
+++ lra-assigns.c	(working copy)
@@ -829,13 +829,17 @@  static int *sorted_pseudos;
    contains pseudos assigned to hard registers.  Such equivalence
    usage might create new conflicts of pseudos with hard registers
    (like ones used for parameter passing or call clobbered ones) or
-   other pseudos assigned to the same hard registers.  Process pseudos
-   assigned to hard registers (most frequently used first), spill if a
-   conflict is found, and mark the spilled pseudos in
-   SPILLED_PSEUDO_BITMAP.  Set up LIVE_HARD_REG_PSEUDOS from pseudos,
-   assigned to hard registers. */
+   other pseudos assigned to the same hard registers.  Another very
+   rare risky transformation is restoring whole multi-register pseudo
+   when only one subreg lives and unused hard register is used already
+   for something else.
+
+   Process pseudos assigned to hard registers (most frequently used
+   first), spill if a conflict is found, and mark the spilled pseudos
+   in SPILLED_PSEUDO_BITMAP.  Set up LIVE_HARD_REG_PSEUDOS from
+   pseudos, assigned to hard registers. */
 static void
-setup_live_pseudos_and_spill_after_equiv_moves (bitmap spilled_pseudo_bitmap)
+setup_live_pseudos_and_spill_after_risky_transforms (bitmap spilled_pseudo_bitmap)
 {
   int p, i, j, n, regno, hard_regno;
   unsigned int k, conflict_regno;
@@ -848,12 +852,12 @@  setup_live_pseudos_and_spill_after_equiv
   for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
     if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0)
       {
-	if (lra_risky_equiv_subst_p)
+	if (lra_risky_transformations_p)
 	  sorted_pseudos[n++] = i;
 	else
 	  update_lives (i, false);
       }
-  if (! lra_risky_equiv_subst_p)
+  if (! lra_risky_transformations_p)
     return;
   qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
   for (i = 0; i < n; i++)
@@ -896,7 +900,7 @@  setup_live_pseudos_and_spill_after_equiv
 	lra_hard_reg_usage[hard_regno + j] -= lra_reg_info[regno].freq;
       reg_renumber[regno] = -1;
       if (lra_dump_file != NULL)
-	fprintf (lra_dump_file, "    Spill r%d after reg equiv. moves\n",
+	fprintf (lra_dump_file, "    Spill r%d after risky transformations\n",
 		 regno);
     }
 }
@@ -1149,7 +1153,7 @@  lra_assign (void)
     regno_allocno_class_array[i] = lra_get_allocno_class (i);
   init_regno_assign_info ();
   bitmap_initialize (&all_spilled_pseudos, &reg_obstack);
-  setup_live_pseudos_and_spill_after_equiv_moves (&all_spilled_pseudos);
+  setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos);
   /* Setup insns to process.  */
   bitmap_initialize (&changed_pseudo_bitmap, &reg_obstack);
   init_live_reload_and_inheritance_pseudos ();
Index: lra-constraints.c
===================================================================
--- lra-constraints.c	(revision 183637)
+++ lra-constraints.c	(working copy)
@@ -254,10 +254,6 @@  get_reload_reg (enum op_type type, enum 
 
   if (type == OP_OUT)
     {
-      /* Unique value is needed when we need reloads for pseudo which
-	 occurs as earlier clobber output and input operands to
-	 guarantee that the both reload pseudos have unique value and
-	 can not be assigned to the same hard register.  */
       *result_reg
 	= lra_create_new_reg_with_unique_value (mode, original, rclass, title);
       return true;
@@ -3315,8 +3311,9 @@  int lra_constraint_iter;
 
 /* True if we substituted equiv which needs checking register
    allocation correctness because the equivalent value contains
-   allocatiable hard registers.  */
-bool lra_risky_equiv_subst_p;
+   allocatiable hard registers or when we restore multi-register
+   pseudo.  */
+bool lra_risky_transformations_p;
 
 /* Entry function of LRA constraint pass.  Return true if the
    constraint pass did change the code.  */
@@ -3338,7 +3335,7 @@  lra_constraints (bool first_p)
       ("Maximum number of LRA constraint passes is achieved (%d)\n",
        MAX_CONSTRAINT_ITERATION_NUMBER);
   changed_p = false;
-  lra_risky_equiv_subst_p = false;
+  lra_risky_transformations_p = false;
   new_insn_uid_start = get_max_uid ();
   new_regno_start = first_p ? lra_constraint_new_regno_start : max_reg_num ();
   for (i = FIRST_PSEUDO_REGISTER; i < new_regno_start; i++)
@@ -3451,7 +3448,7 @@  lra_constraints (bool first_p)
 		      print_rtl_slim (lra_dump_file, curr_insn, curr_insn, -1, 0);
 		    }
 		  if (contains_reg_p (x, true, false))
-		    lra_risky_equiv_subst_p = true;
+		    lra_risky_transformations_p = true;
 		  lra_set_insn_deleted (curr_insn);
 		  continue;
 		}
@@ -4320,7 +4317,11 @@  inherit_in_ebb (rtx head, rtx tail)
 					  dst_regno)
 			&& split_pseudo (true, dst_regno, curr_insn,
 					 next_usage_insns))
-		      change_p = true;
+		      {
+			if (reg->subreg_p)
+			  lra_risky_transformations_p = true;
+			change_p = true;
+		      }
 		    if (! reg->subreg_p)
 		      {
 			HARD_REG_SET s;
@@ -4344,7 +4345,8 @@  inherit_in_ebb (rtx head, rtx tail)
 	  to_inherit_num = 0;
 	  /* Process insn usages.  */
 	  for (reg = curr_id->regs; reg != NULL; reg = reg->next)
-	    if (reg->type != OP_OUT
+	    if ((reg->type != OP_OUT
+		 || (reg->type == OP_OUT && reg->subreg_p))
 		&& (src_regno = reg->regno) >= FIRST_PSEUDO_REGISTER
 		&& src_regno < lra_constraint_new_regno_start)
 	      {
@@ -4379,7 +4381,11 @@  inherit_in_ebb (rtx head, rtx tail)
 			&& NONDEBUG_INSN_P (curr_insn)
 			&& split_pseudo (false, src_regno, curr_insn,
 					 next_usage_insns))
-		      ok_p = change_p = true;
+		      {
+			if (reg->subreg_p)
+			  lra_risky_transformations_p = true;
+			ok_p = change_p = true;
+		      }
 		    if (NONDEBUG_INSN_P (curr_insn))
 		      lra_add_hard_reg_set (reg_renumber[src_regno],
 					    PSEUDO_REGNO_MODE (src_regno),
Index: lra-int.h
===================================================================
--- lra-int.h	(revision 183637)
+++ lra-int.h	(working copy)
@@ -289,7 +289,7 @@  extern rtx lra_secondary_memory[NUM_MACH
 extern int lra_constraint_offset (int, enum machine_mode);
 
 extern int lra_constraint_iter;
-extern bool lra_risky_equiv_subst_p;
+extern bool lra_risky_transformations_p;
 extern int lra_inheritance_iter;
 extern int lra_undo_inheritance_iter;
 extern bool lra_constraints (bool);