Patchwork [U-Boot,1/2] at91: modified NAND flash timing on meesc board

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Submitter Daniel Gorsulowski
Date Jan. 25, 2012, 1:19 p.m.
Message ID <1327497590790-git-send-email-Daniel.Gorsulowski@esd.eu>
Download mbox | patch
Permalink /patch/137757/
State Accepted
Commit dd80264d07ad20cb7fe743af83ee332ce93b8c73
Delegated to: Albert ARIBAUD
Headers show

Comments

Daniel Gorsulowski - Jan. 25, 2012, 1:19 p.m.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
---
 board/esd/meesc/meesc.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
Albert ARIBAUD - Feb. 18, 2012, 11:59 a.m.
Hi Daniel,

Le 25/01/2012 14:19, Daniel Gorsulowski a écrit :
> Signed-off-by: Daniel Gorsulowski<Daniel.Gorsulowski@esd.eu>
> ---
>   board/esd/meesc/meesc.c |    8 ++++----
>   1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
> index 4882ffc..9dd4375 100644
> --- a/board/esd/meesc/meesc.c
> +++ b/board/esd/meesc/meesc.c
> @@ -73,20 +73,20 @@ static void meesc_nand_hw_init(void)
>   	writel(csa,&matrix->csa[0]);
>
>   	/* Configure SMC CS3 for NAND/SmartMedia */
> -	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
> -		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
> +	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
> +		AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(2),
>   		&smc->cs[3].setup);
>
>   	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
>   		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
>   		&smc->cs[3].pulse);
>
> -	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
> +	writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6),
>   		&smc->cs[3].cycle);
>   	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
>   		AT91_SMC_MODE_EXNW_DISABLE |
>   		AT91_SMC_MODE_DBW_8 |
> -		AT91_SMC_MODE_TDF_CYCLE(3),
> +		AT91_SMC_MODE_TDF_CYCLE(12),
>   		&smc->cs[3].mode);
>
>   	/* Configure RDY/BSY */

Is this (and its counterpart for otc570) a performance improvement or a 
bug fix?.

Amicalement,
Daniel Gorsulowski - Feb. 20, 2012, 6:01 a.m.
Hi Albert,

Albert ARIBAUD wrote:
> Hi Daniel,
> 
> Le 25/01/2012 14:19, Daniel Gorsulowski a écrit :
>> Signed-off-by: Daniel Gorsulowski<Daniel.Gorsulowski@esd.eu>
>> ---
>>   board/esd/meesc/meesc.c |    8 ++++----
>>   1 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
>> index 4882ffc..9dd4375 100644
>> --- a/board/esd/meesc/meesc.c
>> +++ b/board/esd/meesc/meesc.c
>> @@ -73,20 +73,20 @@ static void meesc_nand_hw_init(void)
>>       writel(csa,&matrix->csa[0]);
>>
>>       /* Configure SMC CS3 for NAND/SmartMedia */
>> -    writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
>> -        AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
>> +    writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
>> +        AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(2),
>>           &smc->cs[3].setup);
>>
>>       writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
>>           AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
>>           &smc->cs[3].pulse);
>>
>> -    writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
>> +    writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6),
>>           &smc->cs[3].cycle);
>>       writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
>>           AT91_SMC_MODE_EXNW_DISABLE |
>>           AT91_SMC_MODE_DBW_8 |
>> -        AT91_SMC_MODE_TDF_CYCLE(3),
>> +        AT91_SMC_MODE_TDF_CYCLE(12),
>>           &smc->cs[3].mode);
>>
>>       /* Configure RDY/BSY */
> 
> Is this (and its counterpart for otc570) a performance improvement or a
> bug fix?.

There were problems with a new batch of NAND flashes in our production
process. We figured out, that the NAND timing is too fast.
So I would call this a bug fix.
> 
> Amicalement,
> --
> Albert.

Kind regards,
Daniel Gorsulowski
Albert ARIBAUD - Feb. 20, 2012, 8:01 a.m.
Hi Daniel,

Le 25/01/2012 14:19, Daniel Gorsulowski a écrit :
> Signed-off-by: Daniel Gorsulowski<Daniel.Gorsulowski@esd.eu>
> ---
>   board/esd/meesc/meesc.c |    8 ++++----
>   1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
> index 4882ffc..9dd4375 100644
> --- a/board/esd/meesc/meesc.c
> +++ b/board/esd/meesc/meesc.c
> @@ -73,20 +73,20 @@ static void meesc_nand_hw_init(void)
>   	writel(csa,&matrix->csa[0]);
>
>   	/* Configure SMC CS3 for NAND/SmartMedia */
> -	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
> -		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
> +	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
> +		AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(2),
>   		&smc->cs[3].setup);
>
>   	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
>   		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
>   		&smc->cs[3].pulse);
>
> -	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
> +	writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6),
>   		&smc->cs[3].cycle);
>   	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
>   		AT91_SMC_MODE_EXNW_DISABLE |
>   		AT91_SMC_MODE_DBW_8 |
> -		AT91_SMC_MODE_TDF_CYCLE(3),
> +		AT91_SMC_MODE_TDF_CYCLE(12),
>   		&smc->cs[3].mode);
>
>   	/* Configure RDY/BSY */

Considered as a bug fix, and

Applied to u-boot-arm/master, thanks.

Amicalement,

Patch

diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 4882ffc..9dd4375 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -73,20 +73,20 @@  static void meesc_nand_hw_init(void)
 	writel(csa, &matrix->csa[0]);
 
 	/* Configure SMC CS3 for NAND/SmartMedia */
-	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
-		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
+		AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(2),
 		&smc->cs[3].setup);
 
 	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
 		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
 		&smc->cs[3].pulse);
 
-	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+	writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6),
 		&smc->cs[3].cycle);
 	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
 		AT91_SMC_MODE_EXNW_DISABLE |
 		AT91_SMC_MODE_DBW_8 |
-		AT91_SMC_MODE_TDF_CYCLE(3),
+		AT91_SMC_MODE_TDF_CYCLE(12),
 		&smc->cs[3].mode);
 
 	/* Configure RDY/BSY */