Patchwork [testsuite] Fix vec_interleave and vec_extract_even_odd to fall back to vec_perm

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Submitter Ramana Radhakrishnan
Date Jan. 23, 2012, 8:30 a.m.
Message ID <CACUk7=VQF8hbeF8fcVCfga-_B+OsVadqGPjFq0hoLEJsUJF=Kw@mail.gmail.com>
Download mbox | patch
Permalink /patch/137283/
State New
Headers show

Comments

Ramana Radhakrishnan - Jan. 23, 2012, 8:30 a.m.
Hi,

Now that we have vec_perm support, vec_interleave and
vec_extract_even_odd should fall out from that rather than having to
handle an additional target in each of these. This fixes
gcc.dg/vect/slp-11a.c for ARM Neon testing with no other regressions
in gcc.dg/vect

Ok ?


cheers
Ramana


2012-01-23  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

	* lib/target-supports.exp (check_effective_target_vect_interleave): Use
	check_effective_target_vect_perm.
	(check_effective_target_vect_extract_even_odd): Likewise.



-    return $et_vect_interleave_saved
+    return [check_effective_target_vect_perm]
 }

 foreach N {2 3 4 8} {
Jakub Jelinek - Jan. 23, 2012, 9:15 a.m.
On Mon, Jan 23, 2012 at 08:30:46AM +0000, Ramana Radhakrishnan wrote:
> Now that we have vec_perm support, vec_interleave and
> vec_extract_even_odd should fall out from that rather than having to
> handle an additional target in each of these. This fixes
> gcc.dg/vect/slp-11a.c for ARM Neon testing with no other regressions
> in gcc.dg/vect
> 
> Ok ?

That will disable ia64 testing of tests that need vect_extract_even_odd
and vect_interleave.  Not sure if ia64 has good enough vect_perm
support that it can be enabled there though.  Some targets might be
supporting only a couple of specific permutations like these two
and not general permutations.
So safer would be to add [is-effective-target arm_neon_ok] to these
two checks for now.

> 2012-01-23  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
> 
> 	* lib/target-supports.exp (check_effective_target_vect_interleave): Use
> 	check_effective_target_vect_perm.
> 	(check_effective_target_vect_extract_even_odd): Likewise.

	Jakub

Patch

diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index be33407a..1a0e41f 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3473,45 +3473,13 @@  proc check_effective_target_vect_int_mult { } {
 # Return 1 if the target supports vector even/odd elements
extraction, 0 otherwise.

 proc check_effective_target_vect_extract_even_odd { } {
-    global et_vect_extract_even_odd_saved
-
-    if [info exists et_vect_extract_even_odd_saved] {
-        verbose "check_effective_target_vect_extract_even_odd: using
cached result" 2
-    } else {
-        set et_vect_extract_even_odd_saved 0
-        if { [istarget powerpc*-*-*]
-             || [istarget i?86-*-*]
-             || [istarget x86_64-*-*]
-             || [istarget ia64-*-*]
-             || [istarget spu-*-*] } {
-           set et_vect_extract_even_odd_saved 1
-        }
-    }
-
-    verbose "check_effective_target_vect_extract_even_odd: returning
$et_vect_extract_even_odd_saved" 2
-    return $et_vect_extract_even_odd_saved
+    return [check_effective_target_vect_perm]
 }

 # Return 1 if the target supports vector interleaving, 0 otherwise.

 proc check_effective_target_vect_interleave { } {
-    global et_vect_interleave_saved
-
-    if [info exists et_vect_interleave_saved] {
-        verbose "check_effective_target_vect_interleave: using cached result" 2
-    } else {
-        set et_vect_interleave_saved 0
-        if { [istarget powerpc*-*-*]
-             || [istarget i?86-*-*]
-             || [istarget x86_64-*-*]
-             || [istarget ia64-*-*]
-             || [istarget spu-*-*] } {
-           set et_vect_interleave_saved 1
-        }
-    }
-
-    verbose "check_effective_target_vect_interleave: returning
$et_vect_interleave_saved" 2