| Message ID | 1326712216-11197-2-git-send-email-helmut.raiger@hale.at |
|---|---|
| State | Changes Requested |
| Headers | show |
On 16/01/2012 12:10, Helmut Raiger wrote: > Add bit definitions for register 32 and 33 of Freescale PMIC. > > Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> > --- > include/fsl_pmic.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 files changed, 52 insertions(+), 0 deletions(-) > Hi Helmut, > diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h > index 742f2e1..17e7b82 100644 > --- a/include/fsl_pmic.h > +++ b/include/fsl_pmic.h > @@ -102,6 +102,58 @@ enum { > PMIC_NUM_OF_REGS, > }; > > +/* REG_MODE_0 */ > +#define VAUDIOEN (1 << 0) > +#define VAUDIOSTBY (1 << 1) No, this is not correct. I explain it better. Freescale's PMIC that we currently support have the same register names, but their layout differs. What you are defining here is valid for the MC13783, but conflicts with the mc13892. See the comments inside fsl_pmic.h: /* * The registers of different PMIC has the same meaning * but the bit positions of the fields can differ or * some fields has a meaning only on some devices. * You have to check with the internal SPI bitmap * (see Freescale Documentation) to set the registers * for the device you are using */ I checked the REG_0 registers in both PMIC and they differ. The way to do is to have a pmic specific header file with the bit definitions. We have already include/mc13892.h, and you can add include/mc13783.h with the constants you need. Best regards, Stefano Babic
diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h index 742f2e1..17e7b82 100644 --- a/include/fsl_pmic.h +++ b/include/fsl_pmic.h @@ -102,6 +102,58 @@ enum { PMIC_NUM_OF_REGS, }; +/* REG_MODE_0 */ +#define VAUDIOEN (1 << 0) +#define VAUDIOSTBY (1 << 1) +#define VAUDIOMODE (1 << 2) +#define VIOHIEN (1 << 3) +#define VIOHISTBY (1 << 4) +#define VIOHIMODE (1 << 5) +#define VIOLOEN (1 << 6) +#define VIOLOSTBY (1 << 7) +#define VIOLOMODE (1 << 8) +#define VDIGEN (1 << 9) +#define VDIGSTBY (1 << 10) +#define VDIGMODE (1 << 11) +#define VGENEN (1 << 12) +#define VGENSTBY (1 << 13) +#define VGENMODE (1 << 14) +#define VRFDIGEN (1 << 15) +#define VRFDIGSTBY (1 << 16) +#define VRFDIGMODE (1 << 17) +#define VRFREFEN (1 << 18) +#define VRFREFSTBY (1 << 19) +#define VRFREFMODE (1 << 20) +#define VRFCPEN (1 << 21) +#define VRFCPSTBY (1 << 22) +#define VRFCPMODE (1 << 23) + +/* REG_MODE_1 */ +#define VSIMEN (1 << 0) +#define VSIMSTBY (1 << 1) +#define VSIMMODE (1 << 2) +#define VESIMEN (1 << 3) +#define VESIMSTBY (1 << 4) +#define VESIMMODE (1 << 5) +#define VCAMEN (1 << 6) +#define VCAMSTBY (1 << 7) +#define VCAMMODE (1 << 8) +#define VRFBGEN (1 << 9) +#define VRFBGSTBY (1 << 10) +#define VVIBEN (1 << 11) +#define VRF1EN (1 << 12) +#define VRF1STBY (1 << 13) +#define VRF1MODE (1 << 14) +#define VRF2EN (1 << 15) +#define VRF2STBY (1 << 16) +#define VRF2MODE (1 << 17) +#define VMMC1EN (1 << 18) +#define VMMC1STBY (1 << 19) +#define VMMC1MODE (1 << 20) +#define VMMC2EN (1 << 21) +#define VMMC2STBY (1 << 22) +#define VMMC2MODE (1 << 23) + /* REG_POWER_MISC */ #define GPO1EN (1 << 6) #define GPO1STBY (1 << 7)
Add bit definitions for register 32 and 33 of Freescale PMIC. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> --- include/fsl_pmic.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 52 insertions(+), 0 deletions(-)