From patchwork Fri Jan 13 07:11:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasily Khoruzhick X-Patchwork-Id: 135728 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B7191B6F99 for ; Fri, 13 Jan 2012 18:15:02 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DF3AC2881E; Fri, 13 Jan 2012 08:14:39 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GtsQPI4oO5Nv; Fri, 13 Jan 2012 08:14:39 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6BFA028823; Fri, 13 Jan 2012 08:14:27 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2621228809 for ; Fri, 13 Jan 2012 08:14:23 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SXqMbPbvZwhV for ; Fri, 13 Jan 2012 08:14:22 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bk0-f44.google.com (mail-bk0-f44.google.com [209.85.214.44]) by theia.denx.de (Postfix) with ESMTPS id CCEBB28814 for ; Fri, 13 Jan 2012 08:14:09 +0100 (CET) Received: by mail-bk0-f44.google.com with SMTP id q16so1818677bkw.3 for ; Thu, 12 Jan 2012 23:14:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=zn0SM/K3dEdCAu7X8O0rFCNIIG5SRWzsL8O63/lvbs0=; b=gz+LGlJOK2AR0se9bsED4DiAY73giZQOb6X2PItjwI2d8Ecz00zdMCx2pjyif6IO/y Ue40P9jTZLGPExs257oJwos6sbt1XjnnZRazkSuPEeuTla2i2XWVMKw5SW6pKd1+Nouf 8LTeNlMMxEdWvlukA0uVK3FV9jrDLloD1iOOk= Received: by 10.204.148.88 with SMTP id o24mr277339bkv.39.1326438849054; Thu, 12 Jan 2012 23:14:09 -0800 (PST) Received: from anarsoul-laptop.lan ([46.28.102.157]) by mx.google.com with ESMTPS id cg2sm16142572bkb.12.2012.01.12.23.14.07 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 12 Jan 2012 23:14:08 -0800 (PST) From: Vasily Khoruzhick To: u-boot@lists.denx.de, Marek Vasut , Albert Aribaud Date: Fri, 13 Jan 2012 10:11:44 +0300 Message-Id: <1326438704-22383-4-git-send-email-anarsoul@gmail.com> X-Mailer: git-send-email 1.7.8.3 In-Reply-To: <1326438704-22383-1-git-send-email-anarsoul@gmail.com> References: <1326438704-22383-1-git-send-email-anarsoul@gmail.com> Subject: [U-Boot] [PATCH v3 4/4] zipitz2: fix boot issue introduced by PXA low level init rework X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de CONFIG_SYS_INIT_SP_ADDR points to RAM, but it's used before DRAM controller init. Fix it by setting CONFIG_SYS_INIT_SP_ADDR to SRAM Signed-off-by: Vasily Khoruzhick --- v2: no changes v3: introduce PHYS_SRAM, use it for SYS_INIT_SP_ADDR calculation include/configs/zipitz2.h | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 4f48d9b..8add384 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -170,6 +170,12 @@ unsigned char zipitz2_spi_read(void); #endif /* + * SRAM Map + */ +#define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ +#define PHYS_SRAM_SIZE 0x00040000 /* 256k */ + +/* * DRAM Map */ #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ @@ -185,7 +191,7 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048) +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048) /* * NOR FLASH