From patchwork Thu Jan 12 05:53:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 135581 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EBE95B6EFE for ; Thu, 12 Jan 2012 17:29:28 +1100 (EST) Received: from localhost ([::1]:35621 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RlEA3-0006sL-6N for incoming@patchwork.ozlabs.org; Thu, 12 Jan 2012 01:29:19 -0500 Received: from eggs.gnu.org ([140.186.70.92]:44503) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RlDc7-00015I-0U for qemu-devel@nongnu.org; Thu, 12 Jan 2012 00:54:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RlDc5-00034H-If for qemu-devel@nongnu.org; Thu, 12 Jan 2012 00:54:14 -0500 Received: from mail-bk0-f45.google.com ([209.85.214.45]:39697) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RlDc5-00033n-CQ for qemu-devel@nongnu.org; Thu, 12 Jan 2012 00:54:13 -0500 Received: by mail-bk0-f45.google.com with SMTP id j5so1058579bkw.4 for ; Wed, 11 Jan 2012 21:54:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=ePixY3mlf0LpiJaWXwmYB3RhtAVGFXBNdnR+BTNiIsM=; b=g5bj166jmkj9Hg9lkSKhfNnOuE6xrtQM0Yl8TO+tpwgycGBpHzak2tSo98KOXY0Rkc 54JwabLbZ+aKkm+GQsHsrPVJ3f+skRs5y2YpS3VWS5RN8nx4dlK5X30NuWCwkr/tku4X BdmIaqiF177UNYJC68gulygQ7UXKYRc2I+w2E= Received: by 10.205.141.79 with SMTP id jd15mr576315bkc.139.1326347652591; Wed, 11 Jan 2012 21:54:12 -0800 (PST) Received: from octofox.metropolis ([188.134.19.124]) by mx.google.com with ESMTPS id cg2sm8309502bkb.12.2012.01.11.21.54.07 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 11 Jan 2012 21:54:11 -0800 (PST) From: Max Filippov To: qemu-devel@nongnu.org Date: Thu, 12 Jan 2012 09:53:36 +0400 Message-Id: <1326347616-18245-2-git-send-email-jcmvbkbc@gmail.com> X-Mailer: git-send-email 1.7.7.5 In-Reply-To: <1326347616-18245-1-git-send-email-jcmvbkbc@gmail.com> References: <1326347616-18245-1-git-send-email-jcmvbkbc@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.214.45 X-Mailman-Approved-At: Thu, 12 Jan 2012 01:29:10 -0500 Cc: Max Filippov Subject: [Qemu-devel] [PATCH 2/2] target-xtensa: implement info tlb monitor command X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Command dumps valid ITLB and DTLB entries. Signed-off-by: Max Filippov --- hmp-commands.hx | 2 +- monitor.c | 4 +- target-xtensa/cpu.h | 1 + target-xtensa/helper.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 71 insertions(+), 3 deletions(-) diff --git a/hmp-commands.hx b/hmp-commands.hx index a586498..8118ad9 100644 --- a/hmp-commands.hx +++ b/hmp-commands.hx @@ -1305,7 +1305,7 @@ show i8259 (PIC) state @item info pci show emulated PCI device info @item info tlb -show virtual to physical memory mappings (i386, SH4, SPARC, and PPC only) +show virtual to physical memory mappings (i386, SH4, SPARC, PPC, and Xtensa only) @item info mem show the active virtual memory mappings (i386 only) @item info jit diff --git a/monitor.c b/monitor.c index 7334401..8382354 100644 --- a/monitor.c +++ b/monitor.c @@ -2094,7 +2094,7 @@ static void tlb_info(Monitor *mon) #endif -#if defined(TARGET_SPARC) || defined(TARGET_PPC) +#if defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_XTENSA) static void tlb_info(Monitor *mon) { CPUState *env1 = mon_get_cpu(); @@ -2534,7 +2534,7 @@ static mon_cmd_t info_cmds[] = { .mhandler.info = hmp_info_pci, }, #if defined(TARGET_I386) || defined(TARGET_SH4) || defined(TARGET_SPARC) || \ - defined(TARGET_PPC) + defined(TARGET_PPC) || defined(TARGET_XTENSA) { .name = "tlb", .args_type = "", diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 0db83a6..c32bf35 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -344,6 +344,7 @@ void xtensa_tlb_set_entry(CPUState *env, bool dtlb, int xtensa_get_physical_addr(CPUState *env, uint32_t vaddr, int is_write, int mmu_idx, uint32_t *paddr, uint32_t *page_size, unsigned *access); +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env); #define XTENSA_OPTION_BIT(opt) (((uint64_t)1) << (opt)) diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 2a0cb1a..973c268 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -540,3 +540,70 @@ int xtensa_get_physical_addr(CPUState *env, return 0; } } + +static void dump_tlb(FILE *f, fprintf_function cpu_fprintf, + CPUState *env, bool dtlb) +{ + unsigned wi, ei; + const xtensa_tlb *conf = + dtlb ? &env->config->dtlb : &env->config->itlb; + unsigned (*attr_to_access)(uint32_t) = + xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) ? + mmu_attr_to_access : region_attr_to_access; + + for (wi = 0; wi < conf->nways; ++wi) { + uint32_t sz = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1; + const char *sz_text; + bool print_header = true; + + if (sz >= 0x100000) { + sz >>= 20; + sz_text = "MB"; + } else { + sz >>= 10; + sz_text = "KB"; + } + + for (ei = 0; ei < conf->way_size[wi]; ++ei) { + const xtensa_tlb_entry *entry = + xtensa_tlb_get_entry(env, dtlb, wi, ei); + + if (entry->asid) { + unsigned access = attr_to_access(entry->attr); + + if (print_header) { + print_header = false; + cpu_fprintf(f, "Way %u (%d %s)\n", wi, sz, sz_text); + cpu_fprintf(f, + "\tVaddr Paddr ASID Attr RWX\n" + "\t---------- ---------- ---- ---- ---\n"); + } + cpu_fprintf(f, + "\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c\n", + entry->vaddr, + entry->paddr, + entry->asid, + entry->attr, + (access & PAGE_READ) ? 'R' : '-', + (access & PAGE_WRITE) ? 'W' : '-', + (access & PAGE_EXEC) ? 'X' : '-'); + } + } + } +} + +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) +{ + if (xtensa_option_bits_enabled(env->config, + XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) | + XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) | + XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) { + + cpu_fprintf(f, "ITLB:\n"); + dump_tlb(f, cpu_fprintf, env, false); + cpu_fprintf(f, "\nDTLB:\n"); + dump_tlb(f, cpu_fprintf, env, true); + } else { + cpu_fprintf(f, "No TLB for this CPU core\n"); + } +}