From patchwork Wed Jan 11 16:31:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Langsdorf X-Patchwork-Id: 135446 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 836A7B6EFF for ; Thu, 12 Jan 2012 04:55:00 +1100 (EST) Received: from localhost ([::1]:59171 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rl169-0005sy-6E for incoming@patchwork.ozlabs.org; Wed, 11 Jan 2012 11:32:25 -0500 Received: from eggs.gnu.org ([140.186.70.92]:41644) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rl15L-0003Ak-Kf for qemu-devel@nongnu.org; Wed, 11 Jan 2012 11:31:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rl15G-00054w-5N for qemu-devel@nongnu.org; Wed, 11 Jan 2012 11:31:35 -0500 Received: from smtp131.dfw.emailsrvr.com ([67.192.241.131]:60213) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rl15F-00054T-Oa for qemu-devel@nongnu.org; Wed, 11 Jan 2012 11:31:30 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp13.relay.dfw1a.emailsrvr.com (SMTP Server) with ESMTP id 196753D0833; Wed, 11 Jan 2012 11:31:28 -0500 (EST) X-Virus-Scanned: OK Received: by smtp13.relay.dfw1a.emailsrvr.com (Authenticated sender: mark.langsdorf-AT-calxeda.com) with ESMTPSA id D36C83D04C3; Wed, 11 Jan 2012 11:31:27 -0500 (EST) From: Mark Langsdorf To: qemu-devel@nongnu.org Date: Wed, 11 Jan 2012 10:31:28 -0600 Message-Id: <1326299490-10780-5-git-send-email-mark.langsdorf@calxeda.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1326299490-10780-1-git-send-email-mark.langsdorf@calxeda.com> References: <1326213943-878-1-git-send-email-mark.langsdorf@calxeda.com> <1326299490-10780-1-git-send-email-mark.langsdorf@calxeda.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 67.192.241.131 Cc: peter.maydell@linaro.org, mark.langsdorf@calxeda.com, i.mitsyanko@gmail.com, Rob Herring , edgar.iglesias@gmail.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH v9 4/6] arm: Add dummy support for co-processor 15's secure config register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Rob Herring Signed-off-by: Rob Herring Signed-off-by: Mark Langsdorf Reviewed-by: Peter Maydell --- Changes from v7, v8 None Changes from v1, v2, v3, v4, v5, v6 Skipped target-arm/cpu.h | 3 ++- target-arm/helper.c | 9 +++++++++ target-arm/machine.c | 2 ++ 3 files changed, 13 insertions(+), 1 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 26b4981..42c53a7 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -116,6 +116,7 @@ typedef struct CPUARMState { uint32_t c1_sys; /* System control register. */ uint32_t c1_coproc; /* Coprocessor access register. */ uint32_t c1_xscaleauxcr; /* XScale auxiliary control register. */ + uint32_t c1_scr; /* secure config register. */ uint32_t c2_base0; /* MMU translation table base 0. */ uint32_t c2_base1; /* MMU translation table base 1. */ uint32_t c2_control; /* MMU translation table base control. */ @@ -452,7 +453,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list -#define CPU_SAVE_VERSION 5 +#define CPU_SAVE_VERSION 6 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-arm/helper.c b/target-arm/helper.c index fa42c64..00458fc 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1440,6 +1440,11 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) } goto bad_reg; case 1: /* System configuration. */ + if (arm_feature(env, ARM_FEATURE_V7) + && op1 == 0 && crm == 1 && op2 == 0) { + env->cp15.c1_scr = val; + break; + } if (arm_feature(env, ARM_FEATURE_OMAPCP)) op2 = 0; switch (op2) { @@ -1908,6 +1913,10 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) goto bad_reg; } case 1: /* System configuration. */ + if (arm_feature(env, ARM_FEATURE_V7) + && op1 == 0 && crm == 1 && op2 == 0) { + return env->cp15.c1_scr; + } if (arm_feature(env, ARM_FEATURE_OMAPCP)) op2 = 0; switch (op2) { diff --git a/target-arm/machine.c b/target-arm/machine.c index 8984775..f66b8df 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -26,6 +26,7 @@ void cpu_save(QEMUFile *f, void *opaque) qemu_put_be32(f, env->cp15.c1_sys); qemu_put_be32(f, env->cp15.c1_coproc); qemu_put_be32(f, env->cp15.c1_xscaleauxcr); + qemu_put_be32(f, env->cp15.c1_scr); qemu_put_be32(f, env->cp15.c2_base0); qemu_put_be32(f, env->cp15.c2_base1); qemu_put_be32(f, env->cp15.c2_control); @@ -143,6 +144,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) env->cp15.c1_sys = qemu_get_be32(f); env->cp15.c1_coproc = qemu_get_be32(f); env->cp15.c1_xscaleauxcr = qemu_get_be32(f); + env->cp15.c1_scr = qemu_get_be32(f); env->cp15.c2_base0 = qemu_get_be32(f); env->cp15.c2_base1 = qemu_get_be32(f); env->cp15.c2_control = qemu_get_be32(f);