Patchwork [U-Boot,4/8] powerpc/boot: Master module for boot from SRIO

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Submitter Liu Gang
Date Jan. 10, 2012, 11:42 a.m.
Message ID <1326195751-20729-4-git-send-email-Gang.Liu@freescale.com>
Download mbox | patch
Permalink /patch/135223/
State Changes Requested
Headers show

Comments

Liu Gang - Jan. 10, 2012, 11:42 a.m.
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.

The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:

master:
	1. Nor flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image in master Nor flash.
	3. Normally boot from local Nor flash.
	4. Configure SRIO switch system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to SRIO1 or SRIO2 by RCW.
	3. RCW should configure the SerDes, SRIO interfaces correctly.
	4. Slave must be powered on after master's boot.

For the master module, need to finish these processes:
	1. Initialize the SRIO port and address space.
	2. Set inbound SRIO windows covered slave's u-boot image stored in
	   master's Nor flash.
	3. Master's u-boot image should be generated specifically by
	   make xxxx_SRIOBOOT_MASTER_config
	4. Master must boot first, and then slave can be powered on.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/cpu_init.c   |    6 ++-
 arch/powerpc/cpu/mpc8xxx/srio.c       |   42 ++++++++++++++++++++++
 arch/powerpc/include/asm/fsl_srio.h   |   61 +++++++++++++++++++++++++++++++++
 arch/powerpc/include/asm/immap_85xx.h |    3 ++
 boards.cfg                            |    3 ++
 include/configs/corenet_ds.h          |   18 ++++++++++
 6 files changed, 131 insertions(+), 2 deletions(-)
 create mode 100644 arch/powerpc/include/asm/fsl_srio.h
Wolfgang Denk - Jan. 11, 2012, 7:31 a.m.
Dear Liu Gang,

In message <1326195751-20729-4-git-send-email-Gang.Liu@freescale.com> you wrote:
> For the powerpc processors with SRIO interface, boot location can be configured
> from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
> for u-boot image. The image can be fetched from another processor's memory
> space by SRIO link connected between them.
> 
> The processor boots from SRIO is slave, the processor boots from normal flash
> memory space and can help slave to boot from its memory space is master.
> They are different environments and requirements:
> 
> master:
> 	1. Nor flash for its own u-boot image, ucode and ENV space.
> 	2. Slave's u-boot image in master Nor flash.
> 	3. Normally boot from local Nor flash.

Please use "NOR flash" (or "nor flash", if you insist). "Nor" makes
no sense. Please fix globally.


> +	printf("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
> +			CONFIG_SRIOBOOT_MASTER_PORT);
> +	/* configure inbound window1 for slave's u-boot image */
> +	printf("SRIOBOOT - MASTER: Inbound window1 for slave's image; "
> +			"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
> +			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
> +			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
> +			CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);

As mentioned before, this looks a lot like debug code, that should be
removed from a production version.  Use debug() instead?

> +	out_be32((u32)&srio->riwtar1 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
> +			CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
> +	out_be32((u32)&srio->riwbar1 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
> +			CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
> +	out_be32((u32)&srio->riwar1 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
> +			0x80f55000
> +			| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));

This comment applies to the whole patch series:

- Get rid of the base address + oofset notation.  User C structs
  instead.
- Get rid of hard coded magic numbers. #define the needed values in a
  readable way.

Thanks.

Best regards,

Wolfgang Denk
Liu Gang - Jan. 13, 2012, 6:46 a.m.
Dear Wolfgang,

On Wed, 2012-01-11 at 08:31 +0100, Wolfgang Denk wrote:
> > 	3. Normally boot from local Nor flash.
> 
> Please use "NOR flash" (or "nor flash", if you insist). "Nor" makes
> no sense. Please fix globally.

Thanks, will modify.

> > +	printf("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
> > +			CONFIG_SRIOBOOT_MASTER_PORT);
> > +	/* configure inbound window1 for slave's u-boot image */
> > +	printf("SRIOBOOT - MASTER: Inbound window1 for slave's image; "
> > +			"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
> > +			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
> > +			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
> > +			CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
> 
> As mentioned before, this looks a lot like debug code, that should be
> removed from a production version.  Use debug() instead?

These parameters are very important for the boot from srio, for the
different productions may should be different values. So I think that
would be better to keep these informations. I'll use debug() instead!

> This comment applies to the whole patch series:
> 
> - Get rid of the base address + oofset notation.  User C structs
>   instead.
> - Get rid of hard coded magic numbers. #define the needed values in a
>   readable way.

Thanks, will modify.

Best Regards,

Liu Gang

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 9141ba4..42d6475 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -37,6 +37,7 @@ 
 #include <asm/mmu.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
+#include <asm/fsl_srio.h>
 #include <linux/compiler.h>
 #include "mp.h"
 #ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
@@ -48,8 +49,6 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void srio_init(void);
-
 #ifdef CONFIG_QE
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
@@ -443,6 +442,9 @@  skip_l2:
 
 #ifdef CONFIG_SYS_SRIO
 	srio_init();
+#ifdef CONFIG_SRIOBOOT_MASTER
+	srio_boot_master();
+#endif
 #endif
 
 #if defined(CONFIG_MP)
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index e46d328..e8ce3a3 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -21,6 +21,7 @@ 
 #include <config.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
+#include <asm/fsl_srio.h>
 
 #if defined(CONFIG_FSL_CORENET)
 	#define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
@@ -84,3 +85,44 @@  void srio_init(void)
 		setbits_be32(&gur->devdisr, _DEVDISR_RMU);
 	}
 }
+
+#ifdef CONFIG_SRIOBOOT_MASTER
+void srio_boot_master(void)
+{
+	ccsr_rio_t *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
+
+	/* set port accept-all */
+	out_be32((u32)&srio->ptaacr + CONFIG_SRIOBOOT_MASTER_PORT * 0x80,
+				0x10000001);
+
+	printf("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
+			CONFIG_SRIOBOOT_MASTER_PORT);
+	/* configure inbound window1 for slave's u-boot image */
+	printf("SRIOBOOT - MASTER: Inbound window1 for slave's image; "
+			"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
+	out_be32((u32)&srio->riwtar1 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
+	out_be32((u32)&srio->riwbar1 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
+	out_be32((u32)&srio->riwar1 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
+			0x80f55000
+			| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+
+	/* configure inbound window2 for slave's u-boot image */
+	printf("SRIOBOOT - MASTER: Inbound window2 for slave's image; "
+			"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
+			(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
+	out_be32((u32)&srio->riwtar2 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
+	out_be32((u32)&srio->riwbar2 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
+			CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
+	out_be32((u32)&srio->riwar2 + CONFIG_SRIOBOOT_MASTER_PORT * 0x200,
+			0x80f55000
+			| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
+}
+#endif
diff --git a/arch/powerpc/include/asm/fsl_srio.h b/arch/powerpc/include/asm/fsl_srio.h
new file mode 100644
index 0000000..e4cd9b6
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_srio.h
@@ -0,0 +1,61 @@ 
+/*
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _FSL_SRIO_H_
+#define _FSL_SRIO_H_
+
+enum atmu_size {
+	ATMU_SIZE_4K = 0xb,
+	ATMU_SIZE_8K,
+	ATMU_SIZE_16K,
+	ATMU_SIZE_32K,
+	ATMU_SIZE_64K,
+	ATMU_SIZE_128K,
+	ATMU_SIZE_256K,
+	ATMU_SIZE_512K,
+	ATMU_SIZE_1M,
+	ATMU_SIZE_2M,
+	ATMU_SIZE_4M,
+	ATMU_SIZE_8M,
+	ATMU_SIZE_16M,
+	ATMU_SIZE_32M,
+	ATMU_SIZE_64M,
+	ATMU_SIZE_128M,
+	ATMU_SIZE_256M,
+	ATMU_SIZE_512M,
+	ATMU_SIZE_1G,
+	ATMU_SIZE_2G,
+	ATMU_SIZE_4G,
+	ATMU_SIZE_8G,
+	ATMU_SIZE_16G,
+	ATMU_SIZE_32G,
+	ATMU_SIZE_64G,
+};
+
+#define atmu_size_mask(sz)	(__ilog2_u64(sz) - 1)
+#define atmu_size_bytes(x)	(1ULL << ((x & 0x3f) + 1))
+
+extern void srio_init(void);
+#ifdef CONFIG_SRIOBOOT_MASTER
+extern void srio_boot_master(void);
+#endif
+#endif
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 623be17..2f31f96 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2546,6 +2546,7 @@  typedef struct ccsr_snvs_regs {
 
 #define CONFIG_SYS_MPC85xx_PIC_OFFSET		0x40000
 #define CONFIG_SYS_MPC85xx_GUTS_OFFSET		0xE0000
+#define CONFIG_SYS_FSL_SRIO_OFFSET		0xC0000
 
 #define CONFIG_SYS_FSL_CPC_ADDR	\
 	(CONFIG_SYS_CCSRBAR + CONFIG_SYS_FSL_CPC_OFFSET)
@@ -2619,6 +2620,8 @@  typedef struct ccsr_snvs_regs {
 	(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET)
 #define CONFIG_SYS_FSL_FM2_ADDR \
 	(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM2_OFFSET)
+#define CONFIG_SYS_FSL_SRIO_ADDR \
+	(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SRIO_OFFSET)
 
 #define CONFIG_SYS_PCI1_ADDR \
 	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI1_OFFSET)
diff --git a/boards.cfg b/boards.cfg
index dc51211..27f3900 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -734,6 +734,7 @@  P3041DS_NAND		     powerpc     mpc85xx     corenet_ds          freescale      -
 P3041DS_SDCARD		     powerpc     mpc85xx     corenet_ds          freescale      -           P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
 P3041DS_SECURE_BOOT          powerpc     mpc85xx     corenet_ds          freescale      -           P3041DS:SECURE_BOOT
 P3041DS_SPIFLASH	     powerpc     mpc85xx     corenet_ds          freescale      -           P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P3041DS_SRIOBOOT_MASTER		     powerpc     mpc85xx     corenet_ds          freescale      -           P3041DS:SRIOBOOT_MASTER
 P3060QDS		     powerpc	 mpc85xx     p3060qds		 freescale
 P3060QDS_NAND		     powerpc     mpc85xx     p3060qds		 freescale	-	    P3060QDS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
 P3060QDS_SECURE_BOOT         powerpc     mpc85xx     p3060qds            freescale      -           P3060QDS:SECURE_BOOT
@@ -741,11 +742,13 @@  P4080DS                      powerpc     mpc85xx     corenet_ds          freesca
 P4080DS_SDCARD		     powerpc     mpc85xx     corenet_ds          freescale      -           P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
 P4080DS_SECURE_BOOT          powerpc     mpc85xx     corenet_ds          freescale      -           P4080DS:SECURE_BOOT
 P4080DS_SPIFLASH	     powerpc     mpc85xx     corenet_ds          freescale      -           P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P4080DS_SRIOBOOT_MASTER		     powerpc     mpc85xx     corenet_ds          freescale      -           P4080DS:SRIOBOOT_MASTER
 P5020DS                      powerpc     mpc85xx     corenet_ds          freescale
 P5020DS_NAND		     powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
 P5020DS_SDCARD		     powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
 P5020DS_SECURE_BOOT          powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:SECURE_BOOT
 P5020DS_SPIFLASH	     powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P5020DS_SRIOBOOT_MASTER		     powerpc     mpc85xx     corenet_ds          freescale      -           P5020DS:SRIOBOOT_MASTER
 stxgp3                       powerpc     mpc85xx     stxgp3              stx
 stxssa                       powerpc     mpc85xx     stxssa              stx            -           stxssa
 stxssa_4M                    powerpc     mpc85xx     stxssa              stx            -           stxssa:STXSSA_4M
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index e38f69d..2ef5f1b 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -374,6 +374,24 @@ 
 #define CONFIG_SYS_SRIO2_MEM_SIZE	0x10000000	/* 256M */
 
 /*
+ * SRIOBOOT - MASTER
+ */
+#ifdef CONFIG_SRIOBOOT_MASTER
+/* master port for srioboot*/
+#define CONFIG_SRIOBOOT_MASTER_PORT 0
+/* #define CONFIG_SRIOBOOT_MASTER_PORT 1 */
+/*
+ *for slave u-boot IMAGE instored in master memory space,
+ *PHYS must be aligned based on the SIZE
+ */
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 0xfff80000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000	/* 512K */
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull
+#endif
+
+/*
  * eSPI - Enhanced SPI
  */
 #define CONFIG_FSL_ESPI