Patchwork [U-Boot,v2] Blackfin: br4: new board port

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Submitter Mike Frysinger
Date Jan. 8, 2012, 9:25 a.m.
Message ID <1326014737-14326-1-git-send-email-vapier@gentoo.org>
Download mbox | patch
Permalink /patch/134896/
State Accepted
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Comments

Mike Frysinger - Jan. 8, 2012, 9:25 a.m.
From: Dimitar Penev <dpn@switchfin.org>

This adds support for the BR4 Appliance.  It is a quad channel ISDN BRI
board based on Blackfin BF537 CPU.

Signed-off-by: Dimitar Penev <dpn@switchfin.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
v2
	- rebased and applied feedback from Wolfgang

 MAINTAINERS           |    1 +
 board/br4/Makefile    |   50 ++++++++++++++++
 board/br4/br4.c       |   30 +++++++++
 board/br4/config.mk   |   30 +++++++++
 boards.cfg            |    1 +
 include/configs/br4.h |  157 +++++++++++++++++++++++++++++++++++++++++++++++++
 6 files changed, 269 insertions(+), 0 deletions(-)
 create mode 100644 board/br4/Makefile
 create mode 100644 board/br4/br4.c
 create mode 100644 board/br4/config.mk
 create mode 100644 include/configs/br4.h
Dimitar Penev - Jan. 9, 2012, 5:18 p.m.
Hi Mike,

The patch is working on BR4 Appliance hardware.

Best Regards
Dimitar Penev

----- Original Message ----- 
From: "Mike Frysinger" <vapier@gentoo.org>
To: <u-boot@lists.denx.de>
Cc: "Dimitar Penev" <dpn@switchfin.org>
Sent: Sunday, January 08, 2012 11:25 AM
Subject: [PATCH v2] Blackfin: br4: new board port


> From: Dimitar Penev <dpn@switchfin.org>
>
> This adds support for the BR4 Appliance.  It is a quad channel ISDN BRI
> board based on Blackfin BF537 CPU.
>
> Signed-off-by: Dimitar Penev <dpn@switchfin.org>
> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
> ---
> v2
> - rebased and applied feedback from Wolfgang
>
> MAINTAINERS           |    1 +
> board/br4/Makefile    |   50 ++++++++++++++++
> board/br4/br4.c       |   30 +++++++++
> board/br4/config.mk   |   30 +++++++++
> boards.cfg            |    1 +
> include/configs/br4.h |  157 
> +++++++++++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 269 insertions(+), 0 deletions(-)
> create mode 100644 board/br4/Makefile
> create mode 100644 board/br4/br4.c
> create mode 100644 board/br4/config.mk
> create mode 100644 include/configs/br4.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3f83189..93249c2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1156,6 +1156,7 @@ Chong Huang <chuang@ucrobotics.com>
>
> Dimitar Penev <dpn@switchfin.org>
>
> + BR4 Appliance BF537
>  PR1 Appliance BF537
>
> #########################################################################
> diff --git a/board/br4/Makefile b/board/br4/Makefile
> new file mode 100644
> index 0000000..6ae998f
> --- /dev/null
> +++ b/board/br4/Makefile
> @@ -0,0 +1,50 @@
> +#
> +# U-boot - Makefile
> +#
> +# Copyright (c) Switchfin Org. <dpn@switchfin.org>
> +#
> +# Copyright (c) 2005-2007 Analog Device Inc.
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS-y := $(BOARD).o
> +
> +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS-y))
> +SOBJS := $(addprefix $(obj),$(SOBJS-y))
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/br4/br4.c b/board/br4/br4.c
> new file mode 100644
> index 0000000..bc034e3
> --- /dev/null
> +++ b/board/br4/br4.c
> @@ -0,0 +1,30 @@
> +/*
> + * U-boot - main board file
> + *
> + * Copyright (c) Switchfin Org. <dpn@switchfin.org>
> + *
> + * Copyright (c) 2005-2008 Analog Devices Inc.
> + *
> + * (C) Copyright 2000-2004
> + * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> + *
> + * Licensed under the GPL-2 or later.
> + */
> +
> +#include <common.h>
> +#include <net.h>
> +#include <netdev.h>
> +
> +int checkboard(void)
> +{
> + printf("Board: Switchvoice BR4 Appliance\n");
> + printf("       Support: http://www.switchvoice.com/\n");
> + return 0;
> +}
> +
> +#ifdef CONFIG_BFIN_MAC
> +int board_eth_init(bd_t *bis)
> +{
> + return bfin_EMAC_initialize(bis);
> +}
> +#endif
> diff --git a/board/br4/config.mk b/board/br4/config.mk
> new file mode 100644
> index 0000000..9d66d26
> --- /dev/null
> +++ b/board/br4/config.mk
> @@ -0,0 +1,30 @@
> +#
> +# Copyright (c) Switchfin Org. <dpn@switchfin.org>
> +#
> +# Copyright (c) 2005-2008 Analog Device Inc.
> +#
> +# (C) Copyright 2001
> +# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +CFLAGS_lib += -O2
> +CFLAGS_lib/lzma += -O2
> +CFLAGS_lib/zlib += -O2
> diff --git a/boards.cfg b/boards.cfg
> index 2e819e9..6d45438 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -277,6 +277,7 @@ bf561-acvilon                blackfin    blackfin
> bf561-ezkit                  blackfin    blackfin
> blackstamp                   blackfin    blackfin
> blackvme                     blackfin    blackfin
> +br4                          blackfin    blackfin
> cm-bf527                     blackfin    blackfin
> cm-bf533                     blackfin    blackfin
> cm-bf537e                    blackfin    blackfin
> diff --git a/include/configs/br4.h b/include/configs/br4.h
> new file mode 100644
> index 0000000..ef3752d
> --- /dev/null
> +++ b/include/configs/br4.h
> @@ -0,0 +1,157 @@
> +/*
> + * U-boot - Configuration file for BR4 Appliance
> + *
> + * based on bf537-stamp.h
> + * Copyright (c) Switchfin Org. <dpn@switchfin.org>
> + */
> +
> +#ifndef __CONFIG_BR4_H__
> +#define __CONFIG_BR4_H__
> +
> +#include <asm/config-pre.h>
> +
> +
> +/*
> + * Processor Settings
> + */
> +#define CONFIG_BFIN_CPU             bf537-0.3
> +#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_SPI_MASTER
> +
> +
> +/*
> + * Clock Settings
> + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
> + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
> + */
> +/* CONFIG_CLKIN_HZ is any value in Hz */
> +#define CONFIG_CLKIN_HZ 25000000
> +/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN */
> +/*                                                1 = CLKIN / 2 */
> +#define CONFIG_CLKIN_HALF 0
> +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass */
> +/*                                                1 = bypass PLL */
> +#define CONFIG_PLL_BYPASS 0
> +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
> +/* Values can range from 0-63 (where 0 means 64) */
> +#define CONFIG_VCO_MULT 24
> +/* CCLK_DIV controls the core clock divider */
> +/* Values can be 1, 2, 4, or 8 ONLY */
> +#define CONFIG_CCLK_DIV 1
> +/* SCLK_DIV controls the system clock divider */
> +/* Values can range from 1-15 */
> +#define CONFIG_SCLK_DIV 5
> +
> +
> +/*
> + * Memory Settings
> + */
> +#define CONFIG_MEM_ADD_WDTH 10
> +#define CONFIG_MEM_SIZE 64
> +
> +#define CONFIG_EBIU_SDRRC_VAL 0x306
> +#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d
> +
> +#define CONFIG_EBIU_AMGCTL_VAL 0xFF
> +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
> +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
> +
> +#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
> +#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
> +
> +
> +/*
> + * Network Settings
> + */
> +#ifndef __ADSPBF534__
> +#define ADI_CMDS_NETWORK 1
> +#define CONFIG_BFIN_MAC
> +#define CONFIG_NETCONSOLE
> +#endif
> +#define CONFIG_HOSTNAME br4
> +#define CONFIG_TFTP_BLOCKSIZE 4404
> +/* Uncomment next line to use fixed MAC address */
> +/* #define CONFIG_ETHADDR 5c:38:1a:80:a7:00 */
> +
> +
> +/*
> + * Flash Settings
> + */
> +#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */
> +
> +
> +/*
> + * SPI Settings
> + */
> +#define CONFIG_BFIN_SPI
> +#define CONFIG_ENV_SPI_MAX_HZ 30000000
> +#define CONFIG_SF_DEFAULT_SPEED 30000000
> +#define CONFIG_SPI_FLASH
> +#define CONFIG_SPI_FLASH_STMICRO
> +
> +
> +/*
> + * Env Storage Settings
> + */
> +#define CONFIG_ENV_IS_IN_SPI_FLASH
> +#define CONFIG_ENV_OFFSET 0x10000
> +#define CONFIG_ENV_SIZE 0x2000
> +#define CONFIG_ENV_SECT_SIZE 0x10000
> +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
> +
> +
> +/*
> + * I2C Settings
> + */
> +#define CONFIG_BFIN_TWI_I2C
> +#define CONFIG_HARD_I2C
> +
> +
> +/*
> + * NAND Settings
> + */
> +#define CONFIG_NAND_PLAT
> +#define CONFIG_SYS_NAND_BASE 0x20000000
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +
> +#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
> +#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
> +#define BFIN_NAND_WRITE(addr, cmd) \
> + do { \
> + bfin_write8(addr, cmd); \
> + SSYNC(); \
> + } while (0)
> +
> +#define NAND_PLAT_WRITE_CMD(chip, cmd) 
> BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
> +#define NAND_PLAT_WRITE_ADR(chip, cmd) 
> BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
> +#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF9
> +
> +/*
> + * Misc Settings
> + */
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_RTC_BFIN
> +#define CONFIG_UART_CONSOLE 0
> +#define CONFIG_SYS_PROMPT "br4>"
> +#define CONFIG_BOOTCOMMAND "run nandboot"
> +#define CONFIG_BOOTDELAY 2
> +#define CONFIG_LOADADDR 0x2000000
> +
> +
> +/*
> + * Pull in common ADI header for remaining command/environment setup
> + */
> +#include <configs/bfin_adi_common.h>
> +
> +/*
> + * Overwrite some settings defined in bfin_adi_common.h
> + */
> +#undef NAND_ENV_SETTINGS
> +#define NAND_ENV_SETTINGS \
> + "nandargs=set bootargs " CONFIG_BOOTARGS "\0" \
> + "nandboot=" \
> + "nand read $(loadaddr) 0x0 0x900000;" \
> + "run nandargs;" \
> + "bootm" \
> + "\0"
> +
> +#endif
> -- 
> 1.7.8.3
>
>

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 3f83189..93249c2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1156,6 +1156,7 @@  Chong Huang <chuang@ucrobotics.com>
 
 Dimitar Penev <dpn@switchfin.org>
 
+	BR4 Appliance	BF537
 	PR1 Appliance	BF537
 
 #########################################################################
diff --git a/board/br4/Makefile b/board/br4/Makefile
new file mode 100644
index 0000000..6ae998f
--- /dev/null
+++ b/board/br4/Makefile
@@ -0,0 +1,50 @@ 
+#
+# U-boot - Makefile
+#
+# Copyright (c) Switchfin Org. <dpn@switchfin.org>
+#
+# Copyright (c) 2005-2007 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS-y	:= $(BOARD).o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/br4/br4.c b/board/br4/br4.c
new file mode 100644
index 0000000..bc034e3
--- /dev/null
+++ b/board/br4/br4.c
@@ -0,0 +1,30 @@ 
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) Switchfin Org. <dpn@switchfin.org>
+ *
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <net.h>
+#include <netdev.h>
+
+int checkboard(void)
+{
+	printf("Board: Switchvoice BR4 Appliance\n");
+	printf("       Support: http://www.switchvoice.com/\n");
+	return 0;
+}
+
+#ifdef CONFIG_BFIN_MAC
+int board_eth_init(bd_t *bis)
+{
+	return bfin_EMAC_initialize(bis);
+}
+#endif
diff --git a/board/br4/config.mk b/board/br4/config.mk
new file mode 100644
index 0000000..9d66d26
--- /dev/null
+++ b/board/br4/config.mk
@@ -0,0 +1,30 @@ 
+#
+# Copyright (c) Switchfin Org. <dpn@switchfin.org> 
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
+CFLAGS_lib/zlib += -O2
diff --git a/boards.cfg b/boards.cfg
index 2e819e9..6d45438 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -277,6 +277,7 @@  bf561-acvilon                blackfin    blackfin
 bf561-ezkit                  blackfin    blackfin
 blackstamp                   blackfin    blackfin
 blackvme                     blackfin    blackfin
+br4                          blackfin    blackfin
 cm-bf527                     blackfin    blackfin
 cm-bf533                     blackfin    blackfin
 cm-bf537e                    blackfin    blackfin
diff --git a/include/configs/br4.h b/include/configs/br4.h
new file mode 100644
index 0000000..ef3752d
--- /dev/null
+++ b/include/configs/br4.h
@@ -0,0 +1,157 @@ 
+/*
+ * U-boot - Configuration file for BR4 Appliance
+ *
+ * based on bf537-stamp.h
+ * Copyright (c) Switchfin Org. <dpn@switchfin.org>
+ */
+
+#ifndef __CONFIG_BR4_H__
+#define __CONFIG_BR4_H__
+
+#include <asm/config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU             bf537-0.3
+#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_SPI_MASTER
+
+
+/*
+ * Clock Settings
+ *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz					*/
+#define CONFIG_CLKIN_HZ			25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
+/*                                                1 = CLKIN / 2		*/
+#define CONFIG_CLKIN_HALF		0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
+/*                                                1 = bypass PLL	*/
+#define CONFIG_PLL_BYPASS		0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
+/* Values can range from 0-63 (where 0 means 64)			*/
+#define CONFIG_VCO_MULT			24
+/* CCLK_DIV controls the core clock divider				*/
+/* Values can be 1, 2, 4, or 8 ONLY					*/
+#define CONFIG_CCLK_DIV			1
+/* SCLK_DIV controls the system clock divider				*/
+/* Values can range from 1-15						*/
+#define CONFIG_SCLK_DIV			5
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH	10
+#define CONFIG_MEM_SIZE		64
+
+#define CONFIG_EBIU_SDRRC_VAL	0x306
+#define CONFIG_EBIU_SDGCTL_VAL	0x8091998d
+
+#define CONFIG_EBIU_AMGCTL_VAL	0xFF
+#define CONFIG_EBIU_AMBCTL0_VAL	0x7BB07BB0
+#define CONFIG_EBIU_AMBCTL1_VAL	0xFFC27BB0
+
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(384 * 1024)
+
+
+/*
+ * Network Settings
+ */
+#ifndef __ADSPBF534__
+#define ADI_CMDS_NETWORK	1
+#define CONFIG_BFIN_MAC
+#define CONFIG_NETCONSOLE
+#endif
+#define CONFIG_HOSTNAME		br4
+#define CONFIG_TFTP_BLOCKSIZE	4404
+/* Uncomment next line to use fixed MAC address */
+/* #define CONFIG_ETHADDR	5c:38:1a:80:a7:00 */
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_SYS_NO_FLASH	/* We have no parallel FLASH */
+
+
+/*
+ * SPI Settings
+ */
+#define CONFIG_BFIN_SPI
+#define CONFIG_ENV_SPI_MAX_HZ	30000000
+#define CONFIG_SF_DEFAULT_SPEED	30000000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET	0x10000
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x10000
+#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
+
+
+/*
+ * I2C Settings
+ */
+#define CONFIG_BFIN_TWI_I2C
+#define CONFIG_HARD_I2C
+
+
+/*
+ * NAND Settings
+ */
+#define CONFIG_NAND_PLAT
+#define CONFIG_SYS_NAND_BASE		0x20000000
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+
+#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
+#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
+#define BFIN_NAND_WRITE(addr, cmd) \
+	do { \
+		bfin_write8(addr, cmd); \
+		SSYNC(); \
+	} while (0)
+
+#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
+#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
+#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF9
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_RTC_BFIN
+#define CONFIG_UART_CONSOLE	0
+#define CONFIG_SYS_PROMPT	"br4>"
+#define CONFIG_BOOTCOMMAND	"run nandboot"
+#define CONFIG_BOOTDELAY	2
+#define CONFIG_LOADADDR		0x2000000
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+/*
+ * Overwrite some settings defined in bfin_adi_common.h
+ */
+#undef NAND_ENV_SETTINGS
+#define NAND_ENV_SETTINGS \
+	"nandargs=set bootargs " CONFIG_BOOTARGS "\0" \
+	"nandboot=" \
+		"nand read $(loadaddr) 0x0 0x900000;" \
+		"run nandargs;" \
+		"bootm" \
+		"\0"
+
+#endif