| Message ID | 1325845021-31831-1-git-send-email-xiangfu@openmobilefree.net |
|---|---|
| State | Superseded |
| Headers | show |
On 01/06/2012 04:17 AM, Xiangfu Liu wrote: > Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> > --- > arch/mips/cpu/xburst/cpu.c | 4 + > arch/mips/cpu/xburst/start_spl.S | 65 ++++++++++++++++++++ > drivers/mtd/nand/jz4740_nand.c | 40 +++++++++++- > include/configs/qi_lb60.h | 3 + > nand_spl/board/qi/qi_lb60/Makefile | 112 ++++++++++++++++++++++++++++++++++ > nand_spl/board/qi/qi_lb60/nand_spl.c | 37 +++++++++++ > nand_spl/board/qi/qi_lb60/u-boot.lds | 63 +++++++++++++++++++ > 7 files changed, 321 insertions(+), 3 deletions(-) > create mode 100644 arch/mips/cpu/xburst/start_spl.S > create mode 100644 nand_spl/board/qi/qi_lb60/Makefile > create mode 100644 nand_spl/board/qi/qi_lb60/nand_spl.c > create mode 100644 nand_spl/board/qi/qi_lb60/u-boot.lds We are transitioning from nand_spl/ to spl/. Please try to work within the new infrastructure. You may run into problems with size in spl/, due to gc-sections not removing strings on components you don't need -- I plan to fix those issues (for NAND), hopefully this merge window, by requiring all files to be explicitly asked for. Feel free to fix them first if you'd like. :-) > diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c > index e976341..afd166c 100644 > --- a/arch/mips/cpu/xburst/cpu.c > +++ b/arch/mips/cpu/xburst/cpu.c > @@ -42,6 +42,8 @@ > : \ > : "i" (op), "R" (*(unsigned char *)(addr))) > > +#ifndef CONFIG_NAND_SPL > + > void __attribute__((weak)) _machine_restart(void) > { > struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE; > @@ -109,6 +111,8 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) > cache_op(Hit_Invalidate_D, addr); > } > > +#endif > + > void flush_icache_all(void) > { > u32 addr, t = 0; > diff --git a/arch/mips/cpu/xburst/start_spl.S b/arch/mips/cpu/xburst/start_spl.S > new file mode 100644 > index 0000000..f137ccd > --- /dev/null > +++ b/arch/mips/cpu/xburst/start_spl.S > @@ -0,0 +1,65 @@ > +/* > + * Startup Code for MIPS32 XBURST CPU-core > + * > + * Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 3 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#include <config.h> > +#include <version.h> > +#include <asm/regdef.h> > +#include <asm/mipsregs.h> > +#include <asm/addrspace.h> > +#include <asm/cacheops.h> > + > +#include <asm/jz4740.h> > + > + .set noreorder > + > + .globl _start > + .text > +_start: > + .word JZ4740_NANDBOOT_CFG /* fetched during NAND Boot */ > +reset: > + /* > + * STATUS register > + * CU0=UM=EXL=IE=0, BEV=ERL=1, IP2~7=1 > + */ > + li t0, 0x0040FC04 > + mtc0 t0, CP0_STATUS > + /* > + * CAUSE register > + * IV=1, use the specical interrupt vector (0x200) > + */ > + li t1, 0x00800000 > + mtc0 t1, CP0_CAUSE > + > + bal 1f > + nop > + .word _GLOBAL_OFFSET_TABLE_ > +1: > + move gp, ra > + lw t1, 0(ra) > + move gp, t1 > + > + la sp, 0x80004000 > + la t9, nand_spl_boot > + j t9 > + nop Shinya, do the MIPS parts look OK? > +include $(TOPDIR)/config.mk > + > +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds > +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_NAND_SPL_TEXT_BASE) > +AFLAGS += -DCONFIG_NAND_SPL > +CFLAGS += -DCONFIG_NAND_SPL -O2 Why -O2 and not the -Os that you should already be inheriting from config.mk? > +# The JZ4740 CPU can load two areas of data from NAND flash to internal SRAM, > +# one is the normal area up to 8KB starting from NAND flash address 0, the > +# other is the backup area up to 8KB starting from NAND flash address 0x2000. > + > +# After reset, the boot program will first read the normal area data from NAND > +# flash using hardware Reed-Solomon ECC. If no ECC error is detected or ECC > +# error is correctable, the boot program then branches to internal SRAM at 4 > +# bytes offset. ff it detects an uncorrectable ECC error, it will continue to > +# read the backup area of data from NAND flash using hardware Reed-Solomon ECC. Why must the payload come at offset 256K, rather than 16K? > + > +# those 'dd' commands is for create such two 8KB for JZ4740 CPU > +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin > + dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1 > + cat $< $(nandobj)junk1 > $(nandobj)junk2 > + dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3 > + cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4 > + dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5 > + cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6 > + dd bs=1024 count=256 if=$(nandobj)junk6 of=$@ > + rm -f $(nandobj)junk* This is overcomplicated and difficult to follow. Try something like this: # This target is misnamed, but that's the toplevel Makefile's fault $(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin dd if=$< of=$@ conv=sync bs=8192 count=1 dd if=$< of=$@ conv=sync,notrunc oflag=append \ bs=8192 count=1 dd if=/dev/zero of=$@ conv=sync,notrunc oflag=append \ bs=245760 count=1 Or consider using --pad-to or the linker script to add the 8K padding (also add an assert for too-large like arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds does). If you also get rid of the need to pad to 256k, this step then becomes "cat $< $< > $@". > diff --git a/nand_spl/board/qi/qi_lb60/u-boot.lds b/nand_spl/board/qi/qi_lb60/u-boot.lds > new file mode 100644 > index 0000000..7042388 > --- /dev/null > +++ b/nand_spl/board/qi/qi_lb60/u-boot.lds > @@ -0,0 +1,63 @@ > +/* > + * (C) Copyright 2005 > + * Ingenic Semiconductor, <jlwei@ingenic.cn> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips") > + > +OUTPUT_ARCH(mips) > +ENTRY(_start) > +SECTIONS > +{ > + . = 0x00000000; include/configs/qi_lb60.h says CONFIG_NAND_SPL_TEXT_BASE is 0x80000000, not zero. -Scott
Hi Scott thanks for your comments. PATCH v3 have sent out for you to review. On 01/07/2012 06:36 AM, Scott Wood wrote: > We are transitioning from nand_spl/ to spl/. Please try to work within > the new infrastructure. You may run into problems with size in spl/, > due to gc-sections not removing strings on components you don't need -- > I plan to fix those issues (for NAND), hopefully this merge window, by > requiring all files to be explicitly asked for. Feel free to fix them > first if you'd like. :-) > I'd like to move the new spl/. I have one question about the new spl/ I didn't see the new spl/ link to nand_spl/nand_boot.c. so how the new spl/ using nand_boot()? can we add a new define 'CONFIG_SPL_START_S_NAME', since qi_lb60 using start_spl.S for SPL, not start.S. I think better I make the nand_spl/ working. then move to the new spl/ :) >> +include $(TOPDIR)/config.mk >> + >> +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds >> +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_NAND_SPL_TEXT_BASE) >> +AFLAGS += -DCONFIG_NAND_SPL >> +CFLAGS += -DCONFIG_NAND_SPL -O2 > > Why -O2 and not the -Os that you should already be inheriting from > config.mk? when I remove the -O2. it give me error: jz4740.c:(.text.sdram_init+0x14): undefined reference to `memcpy' so I keep the -O2 there. please anyone give me some advice on how to fix this. that will be great. thanks again xiangfu
On Tue, Jan 10, 2012 at 4:13 PM, Xiangfu Liu <xiangfu@openmobilefree.net> wrote: > Hi Scott > > thanks for your comments. PATCH v3 have sent out for you to review. > > > On 01/07/2012 06:36 AM, Scott Wood wrote: >> >> We are transitioning from nand_spl/ to spl/. Please try to work within >> the new infrastructure. You may run into problems with size in spl/, >> due to gc-sections not removing strings on components you don't need -- >> I plan to fix those issues (for NAND), hopefully this merge window, by >> requiring all files to be explicitly asked for. Feel free to fix them >> first if you'd like. :-) >> > > I'd like to move the new spl/. I have one question about the new spl/ > I didn't see the new spl/ link to nand_spl/nand_boot.c. so how the new > spl/ using nand_boot()? > > can we add a new define 'CONFIG_SPL_START_S_NAME', since qi_lb60 using > start_spl.S for SPL, not start.S. you could create a spl/ directory under arch/mips/cpu/xburst/ and move your start_spl.S to arch/mips/cpu/xburst/spl/start.S. Then define in your board config: #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE YOUR_SPL_TEXT_BASE #define CONFIG_SPL_START_S_PATH "arch/mips/cpu/xburst/spl" Add defines CONFIG_SPL_XXX_SUPPORT where XXX is an additional library you need in your SPL binary. I guees you need at least CONFIG_SPL_NAND_SUPPORT. Have a look at spl/Makefile or doc/README.SPL for reference. You should also move your files from nand_spl/board/qi/qi_lb60/ to board/qi/qi_lb60/ and rename u-boot.lds to u-boot-spl.lds. The spl Makefile will automatically use this script. > > I think better I make the nand_spl/ working. then move to the new spl/ :) > > >>> +include $(TOPDIR)/config.mk >>> + >>> +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds >>> +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext >>> $(CONFIG_NAND_SPL_TEXT_BASE) >>> +AFLAGS += -DCONFIG_NAND_SPL >>> +CFLAGS += -DCONFIG_NAND_SPL -O2 >> >> >> Why -O2 and not the -Os that you should already be inheriting from >> config.mk? > > > when I remove the -O2. it give me error: > jz4740.c:(.text.sdram_init+0x14): undefined reference to `memcpy' > so I keep the -O2 there. please anyone give me some advice on how to fix > this. > that will be great. If you use the SPL framework, memcpy won't be linked if you don't use it due to gc-sections.
On 01/10/2012 09:13 AM, Xiangfu Liu wrote: > Hi Scott > > thanks for your comments. PATCH v3 have sent out for you to review. > > On 01/07/2012 06:36 AM, Scott Wood wrote: >> We are transitioning from nand_spl/ to spl/. Please try to work within >> the new infrastructure. You may run into problems with size in spl/, >> due to gc-sections not removing strings on components you don't need -- >> I plan to fix those issues (for NAND), hopefully this merge window, by >> requiring all files to be explicitly asked for. Feel free to fix them >> first if you'd like. :-) >> > > I'd like to move the new spl/. I have one question about the new spl/ > I didn't see the new spl/ link to nand_spl/nand_boot.c. so how the new > spl/ using nand_boot()? It's been moved to drivers/mtd/nand/nand_spl_simple.c and drivers/mtd/nand/nand_spl_load.c. > can we add a new define 'CONFIG_SPL_START_S_NAME', since qi_lb60 using > start_spl.S for SPL, not start.S. Heh, that didn't take long: http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/108574 Or, could we just leave start.o up to the arch Makefile, and just make sure the arch "library" is linked in first? > I think better I make the nand_spl/ working. then move to the new spl/ :) > >>> +include $(TOPDIR)/config.mk >>> + >>> +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds >>> +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext >>> $(CONFIG_NAND_SPL_TEXT_BASE) >>> +AFLAGS += -DCONFIG_NAND_SPL >>> +CFLAGS += -DCONFIG_NAND_SPL -O2 >> >> Why -O2 and not the -Os that you should already be inheriting from >> config.mk? > > when I remove the -O2. it give me error: > jz4740.c:(.text.sdram_init+0x14): undefined reference to `memcpy' > so I keep the -O2 there. please anyone give me some advice on how to fix > this. > that will be great. GCC requires memcpy even in freestanding environments. Can you fit a minimal memcpy in, such as what's currently bcopy in lib/string.c? -Scott
diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c index e976341..afd166c 100644 --- a/arch/mips/cpu/xburst/cpu.c +++ b/arch/mips/cpu/xburst/cpu.c @@ -42,6 +42,8 @@ : \ : "i" (op), "R" (*(unsigned char *)(addr))) +#ifndef CONFIG_NAND_SPL + void __attribute__((weak)) _machine_restart(void) { struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE; @@ -109,6 +111,8 @@ void invalidate_dcache_range(ulong start_addr, ulong stop) cache_op(Hit_Invalidate_D, addr); } +#endif + void flush_icache_all(void) { u32 addr, t = 0; diff --git a/arch/mips/cpu/xburst/start_spl.S b/arch/mips/cpu/xburst/start_spl.S new file mode 100644 index 0000000..f137ccd --- /dev/null +++ b/arch/mips/cpu/xburst/start_spl.S @@ -0,0 +1,65 @@ +/* + * Startup Code for MIPS32 XBURST CPU-core + * + * Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 3 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/cacheops.h> + +#include <asm/jz4740.h> + + .set noreorder + + .globl _start + .text +_start: + .word JZ4740_NANDBOOT_CFG /* fetched during NAND Boot */ +reset: + /* + * STATUS register + * CU0=UM=EXL=IE=0, BEV=ERL=1, IP2~7=1 + */ + li t0, 0x0040FC04 + mtc0 t0, CP0_STATUS + /* + * CAUSE register + * IV=1, use the specical interrupt vector (0x200) + */ + li t1, 0x00800000 + mtc0 t1, CP0_CAUSE + + bal 1f + nop + .word _GLOBAL_OFFSET_TABLE_ +1: + move gp, ra + lw t1, 0(ra) + move gp, t1 + + la sp, 0x80004000 + la t9, nand_spl_boot + j t9 + nop diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c index 3ec34f3..7ef07a5 100644 --- a/drivers/mtd/nand/jz4740_nand.c +++ b/drivers/mtd/nand/jz4740_nand.c @@ -15,6 +15,10 @@ #include <asm/io.h> #include <asm/jz4740.h> +#ifdef CONFIG_NAND_SPL + #define printf(arg...) do {} while (0) +#endif + #define JZ_NAND_DATA_ADDR ((void __iomem *)0xB8000000) #define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000) #define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x10000) @@ -176,7 +180,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat, for (k = 0; k < 9; k++) writeb(read_ecc[k], &emc->nfpar[k]); } - /* Set PRDY */ + writel(readl(&emc->nfecr) | EMC_NFECR_PRDY, &emc->nfecr); /* Wait for completion */ @@ -184,7 +188,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat, status = readl(&emc->nfints); } while (!(status & EMC_NFINTS_DECF)); - /* disable ecc */ + /* Disable ECC */ writel(readl(&emc->nfecr) & ~EMC_NFECR_ECCE, &emc->nfecr); /* Check decoding */ @@ -192,7 +196,7 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat, return 0; if (status & EMC_NFINTS_UNCOR) { - printf("uncorrectable ecc\n"); + printf("JZ4740 uncorrectable ECC\n"); return -1; } @@ -230,6 +234,32 @@ static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat, return errcnt; } +#ifdef CONFIG_NAND_SPL +void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + +#if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R3) || \ + (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R2) + for (i = 0; i < len; i += 2) + buf[i] = readw(this->IO_ADDR_R); +#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3) || \ + (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R2) + for (i = 0; i < len; i++) + buf[i] = readb(this->IO_ADDR_R); +#else + #error JZ4740_NANDBOOT_CFG not defined or wrong +#endif +} + +uint8_t nand_read_byte(struct mtd_info *mtd) +{ + struct nand_chip *this = mtd->priv; + return readb(this->IO_ADDR_R); +} +#endif + /* * Main initialization routine */ @@ -247,6 +277,10 @@ int board_nand_init(struct nand_chip *nand) nand->IO_ADDR_W = JZ_NAND_DATA_ADDR; nand->cmd_ctrl = jz_nand_cmd_ctrl; nand->dev_ready = jz_nand_device_ready; +#ifdef CONFIG_NAND_SPL + nand->read_byte = nand_read_byte; + nand->read_buf = nand_read_buf; +#endif nand->ecc.hwctl = jz_nand_hwctl; nand->ecc.correct = jz_nand_rs_correct_data; nand->ecc.calculate = jz_nand_rs_calculate_ecc; diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h index f989595..c40e4cc 100644 --- a/include/configs/qi_lb60.h +++ b/include/configs/qi_lb60.h @@ -35,6 +35,9 @@ #define CONFIG_BOOTARGS "mem=32M console=tty0 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait" #define CONFIG_BOOTCOMMAND "nand read 0x80600000 0x400000 0x200000;bootm" +#define JZ4740_NANDBOOT_CFG JZ4740_NANDBOOT_B8R3 +#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST + /* * Command line configuration. */ diff --git a/nand_spl/board/qi/qi_lb60/Makefile b/nand_spl/board/qi/qi_lb60/Makefile new file mode 100644 index 0000000..0c4113d --- /dev/null +++ b/nand_spl/board/qi/qi_lb60/Makefile @@ -0,0 +1,112 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_NAND_SPL_TEXT_BASE) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL -O2 + +SOBJS = start.o +COBJS = cpu.o jz4740.o jz_serial.o jz4740_nand.o nand_spl.o nand_boot.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin +all: $(obj).depend $(ALL) + +# The JZ4740 CPU can load two areas of data from NAND flash to internal SRAM, +# one is the normal area up to 8KB starting from NAND flash address 0, the +# other is the backup area up to 8KB starting from NAND flash address 0x2000. + +# After reset, the boot program will first read the normal area data from NAND +# flash using hardware Reed-Solomon ECC. If no ECC error is detected or ECC +# error is correctable, the boot program then branches to internal SRAM at 4 +# bytes offset. ff it detects an uncorrectable ECC error, it will continue to +# read the backup area of data from NAND flash using hardware Reed-Solomon ECC. + +# those 'dd' commands is for create such two 8KB for JZ4740 CPU +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin + dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1 + cat $< $(nandobj)junk1 > $(nandobj)junk2 + dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3 + cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4 + dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5 + cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6 + dd bs=1024 count=256 if=$(nandobj)junk6 of=$@ + rm -f $(nandobj)junk* + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) + cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +# create symbolic links for common files +$(obj)start.S: + @rm -f $@ + ln -s $(SRCTREE)/arch/mips/cpu/xburst/start_spl.S $@ + +$(obj)cpu.c: + @rm -f $@ + ln -s $(SRCTREE)/arch/mips/cpu/xburst/cpu.c $@ + +$(obj)jz4740.c: + @rm -f $@ + ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz4740.c $@ + +$(obj)jz_serial.c: + @rm -f $@ + ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz_serial.c $@ + +$(obj)jz4740_nand.c: + @rm -f $@ + ln -s $(TOPDIR)/drivers/mtd/nand/jz4740_nand.c $@ + +$(obj)nand_boot.c: + @rm -f $@ + ln -s $(SRCTREE)/nand_spl/nand_boot.c $@ + +ifneq ($(OBJTREE), $(SRCTREE)) +$(obj)nand_spl.c: + @rm -f $@ + ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_spl.c $@ +endif + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/nand_spl/board/qi/qi_lb60/nand_spl.c b/nand_spl/board/qi/qi_lb60/nand_spl.c new file mode 100644 index 0000000..6a0358a --- /dev/null +++ b/nand_spl/board/qi/qi_lb60/nand_spl.c @@ -0,0 +1,37 @@ +/* + * Copyright 2012 Xiangfu Liu <xiangfu@sharism.cc> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> + +#include <nand.h> +#include <asm/io.h> +#include <asm/jz4740.h> + +void nand_spl_boot(void) +{ + __gpio_as_sdram_16bit_4720(); + __gpio_as_uart0(); + + pll_init(); + serial_init(); + sdram_init(); + + nand_boot(); +} diff --git a/nand_spl/board/qi/qi_lb60/u-boot.lds b/nand_spl/board/qi/qi_lb60/u-boot.lds new file mode 100644 index 0000000..7042388 --- /dev/null +++ b/nand_spl/board/qi/qi_lb60/u-boot.lds @@ -0,0 +1,63 @@ +/* + * (C) Copyright 2005 + * Ingenic Semiconductor, <jlwei@ingenic.cn> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips") + +OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .sdata : { *(.sdata) } + + _gp = ALIGN(16); + + __got_start = .; + .got : { *(.got) } + __got_end = .; + + .sdata : { *(.sdata) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + uboot_end_data = .; + num_got_entries = (__got_end - __got_start) >> 2; + + . = ALIGN(4); + .sbss : { *(.sbss) } + .bss : { *(.bss) } + uboot_end = .; +}
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> --- arch/mips/cpu/xburst/cpu.c | 4 + arch/mips/cpu/xburst/start_spl.S | 65 ++++++++++++++++++++ drivers/mtd/nand/jz4740_nand.c | 40 +++++++++++- include/configs/qi_lb60.h | 3 + nand_spl/board/qi/qi_lb60/Makefile | 112 ++++++++++++++++++++++++++++++++++ nand_spl/board/qi/qi_lb60/nand_spl.c | 37 +++++++++++ nand_spl/board/qi/qi_lb60/u-boot.lds | 63 +++++++++++++++++++ 7 files changed, 321 insertions(+), 3 deletions(-) create mode 100644 arch/mips/cpu/xburst/start_spl.S create mode 100644 nand_spl/board/qi/qi_lb60/Makefile create mode 100644 nand_spl/board/qi/qi_lb60/nand_spl.c create mode 100644 nand_spl/board/qi/qi_lb60/u-boot.lds