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[v4,2/4] target-mips: Enable 64 bit user mode

Message ID 1325566458-3561-3-git-send-email-khansa@kics.edu.pk
State New
Headers show

Commit Message

Khansa Butt Jan. 3, 2012, 4:54 a.m. UTC 
From: Khansa Butt <khansa@kics.edu.pk>

MIPS_HFLAG_UX is included in env->hflags so that the address computation
for LD instruction does not get treated as 32 bit code, see gen_op_addr_add() in translate.c.

Signed-off-by: Khansa Butt <khansa@kics.edu.pk>
---
 target-mips/translate.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)
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Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d5b1c76..cecdacc 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12773,6 +12773,9 @@  void cpu_reset (CPUMIPSState *env)
 
 #if defined(CONFIG_USER_ONLY)
     env->hflags = MIPS_HFLAG_UM;
+#ifdef TARGET_MIPS64
+     env->hflags |=  MIPS_HFLAG_UX;
+#endif
     /* Enable access to the SYNCI_Step register.  */
     env->CP0_HWREna |= (1 << 1);
     if (env->CP0_Config1 & (1 << CP0C1_FP)) {