Patchwork [SMS] Prevent the creation of reg-moves for definitions with MODE_CC

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Submitter Revital Eres
Date Jan. 1, 2012, 1:51 p.m.
Message ID <CAHz1=dVCa=pvtysEgzpJfbDNZCq4fDcmKcyyKx39hYfGpOMAZQ@mail.gmail.com>
Download mbox | patch
Permalink /patch/133758/
State New
Headers show

Comments

Revital Eres - Jan. 1, 2012, 1:51 p.m.
Hello,

> Yes, thanks for catching this. Shouldn't we prevent creating such
> regmoves for (the other case of) intra-loop anti-deps as well?

Right! sorry for missing that. I added an additional check in
create_ddg_dep_from_intra_loop_link.

Also, thanks to Bernhard Rosenkraenzer for opening PR 879725 for that
ICE in Linaro GCC DB.

Currently re-testing the patch on ppc64-redhat-linux and will commit
it once testing completes if that's OK .

Thanks,
Revital

gcc/
        * ddg.c (def_has_ccmode_p): New function.
        (add_cross_iteration_register_deps,
        create_ddg_dep_from_intra_loop_link): Call it.

testsuite/
        * gcc.dg/sms-11.c: New file.

Patch

Index: ddg.c

===================================================================
--- ddg.c	(revision 182479)

+++ ddg.c	(working copy)

@@ -166,6 +166,24 @@  autoinc_var_is_used_p (rtx def_insn, rtx

   return false;
 }
 
+/* Return true if one of the definitions in INSN has MODE_CC.  Otherwise

+   return false.  */

+static bool

+def_has_ccmode_p (rtx insn)

+{

+  df_ref *def;

+

+  for (def = DF_INSN_DEFS (insn); *def; def++)

+    {

+      enum machine_mode mode = GET_MODE (DF_REF_REG (*def));

+

+      if (GET_MODE_CLASS (mode) == MODE_CC)

+	return true;

+    }

+

+  return false;

+}

+

 /* Computes the dependence parameters (latency, distance etc.), creates
    a ddg_edge and adds it to the given DDG.  */
 static void
@@ -202,6 +220,7 @@  create_ddg_dep_from_intra_loop_link (ddg

      whose register has multiple defs in the loop.  */
   if (flag_modulo_sched_allow_regmoves 
       && (t == ANTI_DEP && dt == REG_DEP)
+      && !def_has_ccmode_p (dest_node->insn)

       && !autoinc_var_is_used_p (dest_node->insn, src_node->insn))
     {
       rtx set;
@@ -335,7 +354,8 @@  add_cross_iteration_register_deps (ddg_p

           if (DF_REF_ID (last_def) != DF_REF_ID (first_def)
               || !flag_modulo_sched_allow_regmoves
 	      || JUMP_P (use_node->insn)
-              || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn))

+              || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn)

+	      || def_has_ccmode_p (DF_REF_INSN (last_def)))

             create_ddg_dep_no_link (g, use_node, first_def_node, ANTI_DEP,
                                     REG_DEP, 1);
 
Index: testsuite/gcc.dg/sms-11.c

===================================================================
--- testsuite/gcc.dg/sms-11.c	(revision 0)

+++ testsuite/gcc.dg/sms-11.c	(revision 0)

@@ -0,0 +1,37 @@ 

+/* { dg-do run } */

+/* { dg-options "-O2 -fmodulo-sched -fmodulo-sched-allow-regmoves -fdump-rtl-sms" } */

+

+extern void abort (void);

+

+float out[4][4] = { 6, 6, 7, 5, 6, 7, 5, 5, 6, 4, 4, 4, 6, 2, 3, 4 };

+

+void

+invert (void)

+{

+  int i, j, k = 0, swap;

+  float tmp[4][4] = { 5, 6, 7, 5, 6, 7, 5, 5, 4, 4, 4, 4, 3, 2, 3, 4 };

+

+  for (i = 0; i < 4; i++)

+    {

+      for (j = i + 1; j < 4; j++)

+	if (tmp[j][i] > tmp[i][i])

+	  swap = j;

+

+      if (swap != i)

+	tmp[i][k] = tmp[swap][k];

+    }

+

+  for (i = 0; i < 4; i++)

+    for (j = 0; j < 4; j++)

+      if (tmp[i][j] != out[i][j])

+	abort ();

+}

+

+int

+main ()

+{

+  invert ();

+  return 0;

+}

+

+/* { dg-final { cleanup-rtl-dump "sms" } } */