Comments
Patch
@@ -69,7 +69,8 @@ static int clear_poll_bit(void __iomem *addr, u32 mask)
* [1] enable the module.
* [2] reset the module.
*
- * In most of the cases, it's ok. But there is a hardware bug in the BCH block.
+ * In most of the cases, it's ok.
+ * But in MX23, there is a hardware bug in the BCH block(see 2847 from errata).
* If you try to soft reset the BCH block, it becomes unusable until
* the next hard reset. This case occurs in the NAND boot mode. When the board
* boots by NAND, the ROM of the chip will initialize the BCH blocks itself.
@@ -78,8 +79,12 @@ static int clear_poll_bit(void __iomem *addr, u32 mask)
*
* To avoid this bug, just add a new parameter `just_enable` for
* the mxs_reset_block(), and rewrite it here.
+ *
+ * The bug has been fixed in the following chips, such as MX28.
+ * But in MX28, if you do NOT reset the BCH module, the BCH module may also
+ * becomes unstable too. So reset the BCH module if it's not MX23.
*/
-int gpmi_reset_block(void __iomem *reset_addr, bool just_enable)
+static int gpmi_reset_block(void __iomem *reset_addr, bool just_enable)
{
int ret;
int timeout = 0x400;
@@ -206,7 +211,8 @@ int bch_set_geometry(struct gpmi_nand_data *this)
if (ret)
goto err_out;
- ret = gpmi_reset_block(r->bch_regs, true);
+ /* see comments for gpmi_reset_block(). */
+ ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this));
if (ret)
goto err_out;