From patchwork Wed Dec 28 01:24:37 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Langsdorf X-Patchwork-Id: 133373 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7F15CB6FE4 for ; Wed, 28 Dec 2011 12:25:19 +1100 (EST) Received: from localhost ([::1]:39803 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfiGW-0001WK-Ub for incoming@patchwork.ozlabs.org; Tue, 27 Dec 2011 20:25:12 -0500 Received: from eggs.gnu.org ([140.186.70.92]:32944) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfiFt-0008Tk-13 for qemu-devel@nongnu.org; Tue, 27 Dec 2011 20:24:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RfiFr-000810-V3 for qemu-devel@nongnu.org; Tue, 27 Dec 2011 20:24:32 -0500 Received: from smtp201.dfw.emailsrvr.com ([67.192.241.201]:41526) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfiFr-00080W-JB for qemu-devel@nongnu.org; Tue, 27 Dec 2011 20:24:31 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp10.relay.dfw1a.emailsrvr.com (SMTP Server) with ESMTP id 2FA5B1B81B2; Tue, 27 Dec 2011 20:24:30 -0500 (EST) X-Virus-Scanned: OK Received: by smtp10.relay.dfw1a.emailsrvr.com (Authenticated sender: mark.langsdorf-AT-calxeda.com) with ESMTPSA id EF1E61B80C0; Tue, 27 Dec 2011 20:24:29 -0500 (EST) From: Mark Langsdorf To: qemu-devel@nongnu.org Date: Tue, 27 Dec 2011 19:24:37 -0600 Message-Id: <1325035480-20409-5-git-send-email-mark.langsdorf@calxeda.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1325035480-20409-1-git-send-email-mark.langsdorf@calxeda.com> References: <1325035480-20409-1-git-send-email-mark.langsdorf@calxeda.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 67.192.241.201 Cc: peter.maydell@linaro.org, Mark Langsdorf , paul@codesourcery.com, rob.herring@calxeda.com Subject: [Qemu-devel] [PATCH v4 4/7] arm: add dummy gic security registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Rob Herring Implement handling for the RAZ/WI gic security registers. Signed-off-by: Rob Herring Signed-off-by: Mark Langsdorf Reviewed-by: Peter Maydell --- Changes from v2, v3 None Changes from v1 Moved handling back inside the 0-0x100 block Added more clarifying comments hw/arm_gic.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 9b52119..0339cf5 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -282,6 +282,10 @@ static uint32_t gic_dist_readb(void *opaque, target_phys_addr_t offset) return ((GIC_NIRQ / 32) - 1) | ((NUM_CPU(s) - 1) << 5); if (offset < 0x08) return 0; + if (offset >= 0x80) { + /* Interrupt Security , RAZ/WI */ + return 0; + } #endif goto bad_reg; } else if (offset < 0x200) { @@ -413,6 +417,8 @@ static void gic_dist_writeb(void *opaque, target_phys_addr_t offset, DPRINTF("Distribution %sabled\n", s->enabled ? "En" : "Dis"); } else if (offset < 4) { /* ignored. */ + } else if (offset >= 0x80) { + /* Interrupt Security Registers, RAZ/WI */ } else { goto bad_reg; }