From patchwork Tue Dec 27 20:13:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Langsdorf X-Patchwork-Id: 133357 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EDE26B6FFA for ; Wed, 28 Dec 2011 07:14:06 +1100 (EST) Received: from localhost ([::1]:50118 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfdPN-0001Fj-AX for incoming@patchwork.ozlabs.org; Tue, 27 Dec 2011 15:14:01 -0500 Received: from eggs.gnu.org ([140.186.70.92]:51967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfdP3-00014e-QV for qemu-devel@nongnu.org; Tue, 27 Dec 2011 15:13:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RfdP2-0000Jy-4S for qemu-devel@nongnu.org; Tue, 27 Dec 2011 15:13:41 -0500 Received: from smtp131.dfw.emailsrvr.com ([67.192.241.131]:34293) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RfdP2-0000JO-1F for qemu-devel@nongnu.org; Tue, 27 Dec 2011 15:13:40 -0500 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp23.relay.dfw1a.emailsrvr.com (SMTP Server) with ESMTP id 6D9642F8403; Tue, 27 Dec 2011 15:13:38 -0500 (EST) X-Virus-Scanned: OK Received: by smtp23.relay.dfw1a.emailsrvr.com (Authenticated sender: mark.langsdorf-AT-calxeda.com) with ESMTPSA id 3D99C2F83CF; Tue, 27 Dec 2011 15:13:38 -0500 (EST) From: Mark Langsdorf To: qemu-devel@nongnu.org Date: Tue, 27 Dec 2011 14:13:43 -0600 Message-Id: <1325016827-11503-6-git-send-email-mark.langsdorf@calxeda.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1325016827-11503-1-git-send-email-mark.langsdorf@calxeda.com> References: <1325016827-11503-1-git-send-email-mark.langsdorf@calxeda.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 67.192.241.131 Cc: kwolf@redhat.com, peter.maydell@linaro.org, Mark Langsdorf , paul@codesourcery.com, rob.herring@calxeda.com Subject: [Qemu-devel] [PATCH v3 5/9] ahci: convert ahci_reset to use AHCIState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Rob Herring Use AHCIState instead of AHCIPCIState so the function can be used for non-PCI based AHCI controllers. Signed-off-by: Rob Herring Signed-off-by: Mark Langsdorf --- Changes from v1, v2 None hw/ide/ahci.c | 14 +++++++------- hw/ide/ich.c | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 0af201d..135d0ee 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -336,7 +336,7 @@ static void ahci_mem_write(void *opaque, target_phys_addr_t addr, case HOST_CTL: /* R/W */ if (val & HOST_CTL_RESET) { DPRINTF(-1, "HBA Reset\n"); - ahci_reset(container_of(s, AHCIPCIState, ahci)); + ahci_reset(s); } else { s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN; ahci_check_irq(s); @@ -1199,18 +1199,18 @@ void ahci_uninit(AHCIState *s) void ahci_reset(void *opaque) { - struct AHCIPCIState *d = opaque; + struct AHCIState *s = opaque; AHCIPortRegs *pr; int i; - d->ahci.control_regs.irqstatus = 0; - d->ahci.control_regs.ghc = 0; + s->control_regs.irqstatus = 0; + s->control_regs.ghc = 0; - for (i = 0; i < d->ahci.ports; i++) { - pr = &d->ahci.dev[i].port_regs; + for (i = 0; i < s->ports; i++) { + pr = &s->dev[i].port_regs; pr->irq_stat = 0; pr->irq_mask = 0; pr->scr_ctl = 0; - ahci_reset_port(&d->ahci, i); + ahci_reset_port(s, i); } } diff --git a/hw/ide/ich.c b/hw/ide/ich.c index 3f7510f..44363ec 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -102,7 +102,7 @@ static int pci_ich9_ahci_init(PCIDevice *dev) /* XXX Software should program this register */ d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */ - qemu_register_reset(ahci_reset, d); + qemu_register_reset(ahci_reset, &d->ahci); msi_init(dev, 0x50, 1, true, false); d->ahci.irq = d->card.irq[0]; @@ -133,7 +133,7 @@ static int pci_ich9_uninit(PCIDevice *dev) d = DO_UPCAST(struct AHCIPCIState, card, dev); msi_uninit(dev); - qemu_unregister_reset(ahci_reset, d); + qemu_unregister_reset(ahci_reset, &d->ahci); ahci_uninit(&d->ahci); return 0;