From patchwork Fri Dec 23 12:25:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Graeme Russ X-Patchwork-Id: 133021 X-Patchwork-Delegate: graeme.russ@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F081DB7170 for ; Fri, 23 Dec 2011 23:27:04 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 15A212823A; Fri, 23 Dec 2011 13:26:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id F707bOwP1SSu; Fri, 23 Dec 2011 13:26:52 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AD8D528255; Fri, 23 Dec 2011 13:26:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 976DF28226 for ; Fri, 23 Dec 2011 13:26:35 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dIW2eLiICF7x for ; Fri, 23 Dec 2011 13:26:35 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yx0-f172.google.com (mail-yx0-f172.google.com [209.85.213.172]) by theia.denx.de (Postfix) with ESMTPS id 8381528228 for ; Fri, 23 Dec 2011 13:26:28 +0100 (CET) Received: by mail-yx0-f172.google.com with SMTP id m7so5475096yen.3 for ; Fri, 23 Dec 2011 04:26:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=2Khj99GoMsCX6Zd4/53rA5xHskq6QX6boQSYPa4MQgA=; b=MyBB+uonP8Q+3npAPF9zwUIdppMm4vuuVeYex5+r6kSLhFLDTpYQjdc5ygyN3GHGe2 3hMf7zrNLalcwOKIy+F9cHcYPipd/Vh/UEtzDImF8quYgmHHE2d+kD9qXsjVBzIFQU1K uydxW8I02eErrHJcCFtzZrF5NcU/8gZrb6jvw= Received: by 10.236.189.104 with SMTP id b68mr20733903yhn.21.1324643188272; Fri, 23 Dec 2011 04:26:28 -0800 (PST) Received: from localhost.localdomain (d58-106-90-149.sbr801.nsw.optusnet.com.au. [58.106.90.149]) by mx.google.com with ESMTPS id y17sm32624370anc.2.2011.12.23.04.26.25 (version=SSLv3 cipher=OTHER); Fri, 23 Dec 2011 04:26:27 -0800 (PST) From: Graeme Russ To: u-boot@lists.denx.de Date: Fri, 23 Dec 2011 23:25:42 +1100 Message-Id: <1324643151-23642-6-git-send-email-graeme.russ@gmail.com> X-Mailer: git-send-email 1.7.5.2.317.g391b14 In-Reply-To: <1324643151-23642-1-git-send-email-graeme.russ@gmail.com> References: <1324643151-23642-1-git-send-email-graeme.russ@gmail.com> Subject: [U-Boot] [RFC 05/14] x86: Create weak init_cache() function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de --- arch/x86/cpu/cpu.c | 16 +++++++++++----- arch/x86/include/asm/u-boot-x86.h | 2 ++ arch/x86/lib/board.c | 3 +++ 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 61d0b69..a8069ad 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -105,6 +105,16 @@ int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f"))); int x86_cpu_init_r(void) { + reload_gdt(); + + /* Initialize core interrupt and exception functionality of CPU */ + cpu_init_interrupts(); + return 0; +} +int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); + +int x86_init_cache(void) +{ const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD); /* turn on the cache and disable write through */ @@ -113,13 +123,9 @@ int x86_cpu_init_r(void) "movl %%eax, %%cr0\n" "wbinvd\n" : : "i" (nw_cd_rst) : "eax"); - reload_gdt(); - - /* Initialize core interrupt and exception functionality of CPU */ - cpu_init_interrupts(); return 0; } -int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); +int init_cache(void) __attribute__((weak, alias("x86_init_cache"))); int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 757a8ee..eaa50cc 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -37,6 +37,8 @@ int x86_cpu_init_r(void); int cpu_init_r(void); int x86_cpu_init_f(void); int cpu_init_f(void); +int x86_init_cache(void); +int init_cache(void); /* cpu/.../timer.c */ void timer_isr(void *); diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index 4736477..fb2b92c 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -267,6 +267,9 @@ void relocate_code(ulong stack_ptr, gd_t *id, ulong reloc_addr) id->start_addr_sp = stack_ptr; + if (init_cache() != 0) + hang(); + calculate_relocation_address(id); copy_uboot_to_ram(id); clear_bss(id);