From patchwork Fri Dec 23 11:40:09 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evgeny Voevodin X-Patchwork-Id: 133016 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4A3DAB7170 for ; Fri, 23 Dec 2011 23:24:13 +1100 (EST) Received: from localhost ([::1]:56229 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Re3V2-0007Da-Os for incoming@patchwork.ozlabs.org; Fri, 23 Dec 2011 06:41:20 -0500 Received: from eggs.gnu.org ([140.186.70.92]:55324) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Re3UL-0005Se-Qy for qemu-devel@nongnu.org; Fri, 23 Dec 2011 06:40:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Re3UD-0006S5-LU for qemu-devel@nongnu.org; Fri, 23 Dec 2011 06:40:37 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:28174) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Re3UD-0006Rm-FO for qemu-devel@nongnu.org; Fri, 23 Dec 2011 06:40:29 -0500 MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: TEXT/PLAIN Received: from euspt1 ([210.118.77.13]) by mailout3.w1.samsung.com (Sun Java(tm) System Messaging Server 6.3-8.04 (built Jul 29 2009; 32bit)) with ESMTP id <0LWN0054IN3G4B40@mailout3.w1.samsung.com> for qemu-devel@nongnu.org; Fri, 23 Dec 2011 11:40:28 +0000 (GMT) Received: from evvoevodinPC.rnd.samsung.ru ([106.109.8.48]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LWN008DBN35PZ@spt1.w1.samsung.com> for qemu-devel@nongnu.org; Fri, 23 Dec 2011 11:40:28 +0000 (GMT) Date: Fri, 23 Dec 2011 15:40:09 +0400 From: Evgeny Voevodin In-reply-to: <1324640414-16000-1-git-send-email-e.voevodin@samsung.com> To: qemu-devel@nongnu.org Message-id: <1324640414-16000-7-git-send-email-e.voevodin@samsung.com> X-Mailer: git-send-email 1.7.4.1 References: <1324640414-16000-1-git-send-email-e.voevodin@samsung.com> X-detected-operating-system: by eggs.gnu.org: Solaris 9.1 X-Received-From: 210.118.77.13 Cc: kyungmin.park@samsung.com, m.kozlov@samsung.com, jehyung.lee@samsung.com, d.solodkiy@samsung.com, Evgeny Voevodin Subject: [Qemu-devel] [PATCH v5 06/11] hw/arm_boot.c: Extend secondary CPU bootloader. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Secondary CPU bootloader enables interrupt and issues wfi until start address is written to system controller. The position where to find this start address is hardcoded to 0x10000030. This commit extends bootloader for secondary CPU to allow a target board to cpecify a position where to find start address. If target board doesn't specify start address then default 0x10000030 is used. Signed-off-by: Evgeny Voevodin --- hw/arm-misc.h | 1 + hw/arm_boot.c | 23 +++++++++++++++-------- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/hw/arm-misc.h b/hw/arm-misc.h index af403a1..6e8ae6b 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -31,6 +31,7 @@ struct arm_boot_info { const char *initrd_filename; target_phys_addr_t loader_start; target_phys_addr_t smp_loader_start; + target_phys_addr_t smp_bootreg_addr; target_phys_addr_t smp_priv_base; int nb_cpus; int board_id; diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 215d5de..700a89d 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -31,17 +31,17 @@ static uint32_t bootloader[] = { /* Entry point for secondary CPUs. Enable interrupt controller and Issue WFI until start address is written to system controller. */ static uint32_t smpboot[] = { - 0xe59f0020, /* ldr r0, privbase */ - 0xe3a01001, /* mov r1, #1 */ - 0xe5801100, /* str r1, [r0, #0x100] */ - 0xe3a00201, /* mov r0, #0x10000000 */ - 0xe3800030, /* orr r0, #0x30 */ + 0xe59f201c, /* ldr r2, privbase */ + 0xe59f001c, /* ldr r0, startaddr */ + 0xe3a01001, /* mov r1, #1 */ + 0xe5821100, /* str r1, [r2, #256] */ 0xe320f003, /* wfi */ 0xe5901000, /* ldr r1, [r0] */ 0xe1110001, /* tst r1, r1 */ 0x0afffffb, /* beq */ 0xe12fff11, /* bx r1 */ - 0 /* privbase: Private memory region base address. */ + 0, /* privbase: Private memory region base address. */ + 0 /* bootreg: Boot register address is held here */ }; #define WRITE_WORD(p, value) do { \ @@ -179,6 +179,8 @@ static void do_cpu_reset(void *opaque) { CPUState *env = opaque; const struct arm_boot_info *info = env->boot_info; + uint32_t smp_bootreg_addr = 0; + target_phys_addr_t p = info->smp_bootreg_addr; cpu_reset(env); if (info) { @@ -197,6 +199,7 @@ static void do_cpu_reset(void *opaque) info->loader_start); } } else { + WRITE_WORD(p, smp_bootreg_addr); env->regs[15] = info->smp_loader_start; } } @@ -272,8 +275,12 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info) rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader), info->loader_start); if (info->nb_cpus > 1) { - smpboot[10] = info->smp_priv_base; - for (n = 0; n < sizeof(smpboot) / 4; n++) { + if (!info->smp_bootreg_addr) { + info->smp_bootreg_addr = 0x10000030; + } + smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr; + smpboot[ARRAY_SIZE(smpboot) - 2] = info->smp_priv_base; + for (n = 0; n < ARRAY_SIZE(smpboot); n++) { smpboot[n] = tswap32(smpboot[n]); } rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),