Patchwork ARM: imx6q: build pm code only when CONFIG_PM selected

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Submitter Eric Miao
Date Dec. 22, 2011, 2:50 a.m.
Message ID <CAMPhdO-EG7Sy7ekHnXMh8qBKchuM92zmeXExc59E65g-_2RY=g@mail.gmail.com>
Download mbox | patch
Permalink /patch/132768/
State New
Headers show

Comments

Eric Miao - Dec. 22, 2011, 2:50 a.m.
On Wed, Dec 21, 2011 at 11:33 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
> On Wed, Dec 21, 2011 at 11:23:47PM +0800, Shawn Guo wrote:
>> > diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/head-v7.S
>> > index 6229efb..830b5c8 100644
>> > --- a/arch/arm/mach-imx/head-v7.S
>> > +++ b/arch/arm/mach-imx/head-v7.S
>> > @@ -80,12 +80,14 @@ ENDPROC(v7_secondary_startup)
>> >     .align
>> >
>> >     .macro  pl310_resume
>> > +#ifdef CONFIG_CACHE_L2X0
>> >     ldr     r2, phys_l2x0_saved_regs
>> >     ldr     r0, [r2, #L2X0_R_PHY_BASE]      @ get physical base of l2x0
>> >     ldr     r1, [r2, #L2X0_R_AUX_CTRL]      @ get aux_ctrl value
>> >     str     r1, [r0, #L2X0_AUX_CTRL]        @ restore aux_ctrl
>> >     mov     r1, #0x1
>> >     str     r1, [r0, #L2X0_CTRL]            @ re-enable L2
>> > +#endif
>> >     .endm
>> >
>> >  ENTRY(v7_cpu_resume)
>> > @@ -94,6 +96,8 @@ ENTRY(v7_cpu_resume)
>> >     b       cpu_resume
>> >  ENDPROC(v7_cpu_resume)
>> >
>> > +#ifdef CONFIG_CACHE_L2X0
>> >     .globl  phys_l2x0_saved_regs
>> >  phys_l2x0_saved_regs:
>> >          .long   0
>> > +#endif
>>
>> But I'm thinking about if we can solve this at L2X0 level instead of
>> introducing ifdef all over every platform code.
>>
> Never mind.  Even if we have L2X0_R_PHY_BASE L2X0_R_AUX_CTRL defined
> for non-L2X0 build, we still need ifdef for pl310_resume calling.
>
> But can we save one ifdef by leaving phys_l2x0_saved_regs there?

Or we can have something like this:
Shawn Guo - Dec. 22, 2011, 3:30 a.m.
On Thu, Dec 22, 2011 at 10:50:58AM +0800, Eric Miao wrote:
> On Wed, Dec 21, 2011 at 11:33 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
> > On Wed, Dec 21, 2011 at 11:23:47PM +0800, Shawn Guo wrote:
> >> > diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/head-v7.S
> >> > index 6229efb..830b5c8 100644
> >> > --- a/arch/arm/mach-imx/head-v7.S
> >> > +++ b/arch/arm/mach-imx/head-v7.S
> >> > @@ -80,12 +80,14 @@ ENDPROC(v7_secondary_startup)
> >> >     .align
> >> >
> >> >     .macro  pl310_resume
> >> > +#ifdef CONFIG_CACHE_L2X0
> >> >     ldr     r2, phys_l2x0_saved_regs
> >> >     ldr     r0, [r2, #L2X0_R_PHY_BASE]      @ get physical base of l2x0
> >> >     ldr     r1, [r2, #L2X0_R_AUX_CTRL]      @ get aux_ctrl value
> >> >     str     r1, [r0, #L2X0_AUX_CTRL]        @ restore aux_ctrl
> >> >     mov     r1, #0x1
> >> >     str     r1, [r0, #L2X0_CTRL]            @ re-enable L2
> >> > +#endif
> >> >     .endm
> >> >
> >> >  ENTRY(v7_cpu_resume)
> >> > @@ -94,6 +96,8 @@ ENTRY(v7_cpu_resume)
> >> >     b       cpu_resume
> >> >  ENDPROC(v7_cpu_resume)
> >> >
> >> > +#ifdef CONFIG_CACHE_L2X0
> >> >     .globl  phys_l2x0_saved_regs
> >> >  phys_l2x0_saved_regs:
> >> >          .long   0
> >> > +#endif
> >>
> >> But I'm thinking about if we can solve this at L2X0 level instead of
> >> introducing ifdef all over every platform code.
> >>
> > Never mind.  Even if we have L2X0_R_PHY_BASE L2X0_R_AUX_CTRL defined
> > for non-L2X0 build, we still need ifdef for pl310_resume calling.
> >
> > But can we save one ifdef by leaving phys_l2x0_saved_regs there?
> 
> Or we can have something like this:
> 

Looks good to me.  Care to create a patch for this?  I will try to
queue both of them.
Eric Miao - Dec. 22, 2011, 3:57 a.m.
On Thu, Dec 22, 2011 at 11:30 AM, Shawn Guo <shawn.guo@freescale.com> wrote:
> On Thu, Dec 22, 2011 at 10:50:58AM +0800, Eric Miao wrote:
>> On Wed, Dec 21, 2011 at 11:33 PM, Shawn Guo <shawn.guo@freescale.com> wrote:
>> > On Wed, Dec 21, 2011 at 11:23:47PM +0800, Shawn Guo wrote:
>> >> > diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/head-v7.S
>> >> > index 6229efb..830b5c8 100644
>> >> > --- a/arch/arm/mach-imx/head-v7.S
>> >> > +++ b/arch/arm/mach-imx/head-v7.S
>> >> > @@ -80,12 +80,14 @@ ENDPROC(v7_secondary_startup)
>> >> >     .align
>> >> >
>> >> >     .macro  pl310_resume
>> >> > +#ifdef CONFIG_CACHE_L2X0
>> >> >     ldr     r2, phys_l2x0_saved_regs
>> >> >     ldr     r0, [r2, #L2X0_R_PHY_BASE]      @ get physical base of l2x0
>> >> >     ldr     r1, [r2, #L2X0_R_AUX_CTRL]      @ get aux_ctrl value
>> >> >     str     r1, [r0, #L2X0_AUX_CTRL]        @ restore aux_ctrl
>> >> >     mov     r1, #0x1
>> >> >     str     r1, [r0, #L2X0_CTRL]            @ re-enable L2
>> >> > +#endif
>> >> >     .endm
>> >> >
>> >> >  ENTRY(v7_cpu_resume)
>> >> > @@ -94,6 +96,8 @@ ENTRY(v7_cpu_resume)
>> >> >     b       cpu_resume
>> >> >  ENDPROC(v7_cpu_resume)
>> >> >
>> >> > +#ifdef CONFIG_CACHE_L2X0
>> >> >     .globl  phys_l2x0_saved_regs
>> >> >  phys_l2x0_saved_regs:
>> >> >          .long   0
>> >> > +#endif
>> >>
>> >> But I'm thinking about if we can solve this at L2X0 level instead of
>> >> introducing ifdef all over every platform code.
>> >>
>> > Never mind.  Even if we have L2X0_R_PHY_BASE L2X0_R_AUX_CTRL defined
>> > for non-L2X0 build, we still need ifdef for pl310_resume calling.
>> >
>> > But can we save one ifdef by leaving phys_l2x0_saved_regs there?
>>
>> Or we can have something like this:
>>
>
> Looks good to me.  Care to create a patch for this?  I will try to
> queue both of them.

Sent, in a separate mail, you and Lothar were both Cc'ed.

Patch

diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/head-v7.S
index a59cae7..cec23a8 100644
--- a/arch/arm/mach-imx/head-v7.S
+++ b/arch/arm/mach-imx/head-v7.S
@@ -80,6 +80,7 @@  ENDPROC(v7_secondary_startup)
        .data
        .align

+#ifdef CONFIG_CACHE_L2X0
        .macro  pl310_resume
        ldr     r2, phys_l2x0_saved_regs
        ldr     r0, [r2, #L2X0_R_PHY_BASE]      @ get physical base of l2x0
@@ -89,13 +90,17 @@  ENDPROC(v7_secondary_startup)
        str     r1, [r0, #L2X0_CTRL]            @ re-enable L2
        .endm

+       .globl  phys_l2x0_saved_regs
+phys_l2x0_saved_regs:
+        .long   0
+#else
+       .macro  pl310_resume
+       .endm
+#endif
+
 ENTRY(v7_cpu_resume)
        bl      v7_invalidate_l1
        pl310_resume
        b       cpu_resume
 ENDPROC(v7_cpu_resume)
-
-       .globl  phys_l2x0_saved_regs
-phys_l2x0_saved_regs:
-        .long   0
 #endif