Patchwork [01/10] mips: Allow mode changes between integrals in FP registers.

login
register
mail settings
Submitter Richard Henderson
Date Dec. 21, 2011, 5 p.m.
Message ID <1324486822-18225-2-git-send-email-rth@redhat.com>
Download mbox | patch
Permalink /patch/132685/
State New
Headers show

Comments

Richard Henderson - Dec. 21, 2011, 5 p.m.
We ask for subregs of vectors all of the time, punning them between

Patch

different vector modes.  The test below allows punning between DI,
V8QI, V4HI, and V2SI modes.  Without this we get oodles of dummy
copies to and from the general register set for each mode change.


---
 gcc/config/mips/mips.c |   11 +++++++++--
 1 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 3866c46..84d4f8b 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -10782,8 +10782,8 @@  mips_class_max_nregs (enum reg_class rclass, enum machine_mode mode)
 /* Implement CANNOT_CHANGE_MODE_CLASS.  */
 
 bool
-mips_cannot_change_mode_class (enum machine_mode from ATTRIBUTE_UNUSED,
-			       enum machine_mode to ATTRIBUTE_UNUSED,
+mips_cannot_change_mode_class (enum machine_mode from,
+			       enum machine_mode to,
 			       enum reg_class rclass)
 {
   /* There are several problems with changing the modes of values in
@@ -10808,6 +10808,13 @@  mips_cannot_change_mode_class (enum machine_mode from ATTRIBUTE_UNUSED,
        format.
 
      We therefore disallow all mode changes involving FPRs.  */
+
+  /* Except for Loongson and its integral vectors.  We need to be able
+     to change between those modes easily.  */
+  if (GET_MODE_SIZE (from) == 8 && GET_MODE_SIZE (to) == 8
+      && INTEGRAL_MODE_P (from) && INTEGRAL_MODE_P (to))
+    return false;
+
   return reg_classes_intersect_p (FP_REGS, rclass);
 }