From patchwork Sun Dec 18 17:34:15 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 132106 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BE3B5B7046 for ; Mon, 19 Dec 2011 04:37:53 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RcKdV-0002IO-DZ; Sun, 18 Dec 2011 17:34:57 +0000 Received: from mail-ee0-f49.google.com ([74.125.83.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RcKdM-0002Hj-TY for linux-arm-kernel@lists.infradead.org; Sun, 18 Dec 2011 17:34:51 +0000 Received: by mail-ee0-f49.google.com with SMTP id c13so3569516eek.36 for ; Sun, 18 Dec 2011 09:34:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=Sv4QxMq4enOgT0l3Dd7LysxG78wMQ2bJj8itDStSIdw=; b=dQj2wfDGBbHtpZyJm5Cbsaw/XgKI1AYFeSG379PTRHEQ+6yK2+mkMCNLSL6AG8/JhE 7XQ0Q4z02jzhoc1GR4oY9MEhKNYpqqTDQYnnmF7lXMkmiN/iVy+atZzcMokj0R5RJBhg GhRN3LcXw6fl0CPV01Yo6AQnrYoNZrUo+8Ec8= Received: by 10.213.105.133 with SMTP id t5mr4362881ebo.105.1324229688542; Sun, 18 Dec 2011 09:34:48 -0800 (PST) Received: from asterix.localdomain (p4FEE1F89.dip.t-dialin.net. [79.238.31.137]) by mx.google.com with ESMTPS id z54sm32895972eeh.5.2011.12.18.09.34.45 (version=SSLv3 cipher=OTHER); Sun, 18 Dec 2011 09:34:47 -0800 (PST) From: Dirk Behme To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2 v2] imx: add polled io uart methods Date: Sun, 18 Dec 2011 18:34:15 +0100 Message-Id: <1324229655-5538-2-git-send-email-dirk.behme@gmail.com> X-Mailer: git-send-email 1.7.7.4 In-Reply-To: <1324229655-5538-1-git-send-email-dirk.behme@gmail.com> References: <1324229655-5538-1-git-send-email-dirk.behme@gmail.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (dirk.behme[at]googlemail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Sascha Hauer , Dirk Behme , linux-serial@vger.kernel.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Fabio Estevam , Saleem Abdulrasool X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Saleem Abdulrasool These methods are invoked if the iMX uart is used in conjuction with kgdb during early boot. In order to access the UART without the interrupts, the kernel uses the basic polling methods for IO with the device. With these methods implemented, it is now possible to enable kgdb during early boot over serial. Signed-off-by: Saleem Abdulrasool Signed-off-by: Dirk Behme CC: Sascha Hauer CC: Fabio Estevam CC: Uwe Kleine-König CC: linux-serial@vger.kernel.org --- Note: Changes in the v2 compared to Saleem's original version: * Remove volatile form status variable * Remove blank line * Factor out imx_console_mode/restore() drivers/tty/serial/imx.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 66 insertions(+), 0 deletions(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 6a01c2a..cd81ac0 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -102,6 +102,7 @@ #define UCR2_STPB (1<<6) /* Stop */ #define UCR2_WS (1<<5) /* Word size */ #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ +#define UCR2_ATEN (1<<3) /* Aging Timer Enable */ #define UCR2_TXEN (1<<2) /* Transmitter enabled */ #define UCR2_RXEN (1<<1) /* Receiver enabled */ #define UCR2_SRST (1<<0) /* SW reset */ @@ -1104,6 +1105,66 @@ imx_verify_port(struct uart_port *port, struct serial_struct *ser) return ret; } +#if defined(CONFIG_CONSOLE_POLL) +static int imx_poll_get_char(struct uart_port *port) +{ + unsigned int status, cr1, cr2, cr3; + unsigned char c; + + /* save control registers */ + imx_console_mode(port, &cr1, &cr2, &cr3); + + /* disable interrupts */ + writel(UCR1_UARTEN, port->membase + UCR1); + writel(cr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), + port->membase + UCR2); + writel(cr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), port->membase + UCR3); + + /* poll */ + do { + status = readl(port->membase + USR2); + } while (~status & USR2_RDR); + + /* read */ + c = readl(port->membase + URXD0); + + /* restore control registers */ + imx_console_restore(port, cr1, cr2, cr3); + + return c & 0xff; +} + +static void imx_poll_put_char(struct uart_port *port, unsigned char c) +{ + unsigned int status, cr1, cr2, cr3; + + /* save control registers */ + imx_console_mode(port, &cr1, &cr2, &cr3); + + /* disable interrupts */ + writel(UCR1_UARTEN, port->membase + UCR1); + writel(cr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), + port->membase + UCR2); + writel(cr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), port->membase + UCR3); + + /* drain */ + do { + status = readl(port->membase + USR1); + } while (~status & USR1_TRDY); + + /* write */ + writel(c, port->membase + URTX0); + + /* flush */ + do { + status = readl(port->membase + USR2); + } while (~status & USR2_TXDC); + + /* restore control registers */ + imx_console_restore(port, cr1, cr2, cr3); +} +#endif + static struct uart_ops imx_pops = { .tx_empty = imx_tx_empty, .set_mctrl = imx_set_mctrl, @@ -1121,6 +1182,11 @@ static struct uart_ops imx_pops = { .request_port = imx_request_port, .config_port = imx_config_port, .verify_port = imx_verify_port, + +#if defined(CONFIG_CONSOLE_POLL) + .poll_get_char = imx_poll_get_char, + .poll_put_char = imx_poll_put_char, +#endif }; static struct imx_port *imx_ports[UART_NR];