From patchwork Fri Dec 16 18:06:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Snyder X-Patchwork-Id: 131878 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 86F5A1007D4 for ; Sat, 17 Dec 2011 05:06:58 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EE1312845F; Fri, 16 Dec 2011 19:06:56 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 55v1InTysLo6; Fri, 16 Dec 2011 19:06:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C6B4D2847D; Fri, 16 Dec 2011 19:06:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 41E652847D for ; Fri, 16 Dec 2011 19:06:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pt6GTvb3kVly for ; Fri, 16 Dec 2011 19:06:52 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from ovro.ovro.caltech.edu (ovro.ovro.caltech.edu [192.100.16.2]) by theia.denx.de (Postfix) with ESMTP id 1A9DA2845F for ; Fri, 16 Dec 2011 19:06:51 +0100 (CET) Received: from ovro.caltech.edu (rena.ovro.pvt [192.168.0.80]) (using TLSv1 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by ovro.ovro.caltech.edu (Postfix) with ESMTP id 7156811C806D; Fri, 16 Dec 2011 10:06:49 -0800 (PST) Date: Fri, 16 Dec 2011 10:06:48 -0800 From: "Ira W. Snyder" To: Jim Lentz Message-ID: <20111216180648.GB13048@ovro.caltech.edu> References: <4EEB4C25.2070005@zhone.com> <4EEB5B60.6070500@zhone.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4EEB5B60.6070500@zhone.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (ovro.ovro.caltech.edu); Fri, 16 Dec 2011 10:06:49 -0800 (PST) Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] fsl_esdhc.c bug X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de On Fri, Dec 16, 2011 at 09:53:20AM -0500, Jim Lentz wrote: > On 12/16/2011 09:51 AM, Fabio Estevam wrote: > > Hi Jim, > > > > On Fri, Dec 16, 2011 at 11:48 AM, Jim Lentz wrote: > >> All, > >> > >> There is a bug rendering SDCard support useless on Freescale esdhc > >> controller. > > Which Freescale processor do you use? > > > > Please describe in details the problem you see, how to reproduce it, > > the U-boot version > > that you use, etc. > > > > Regards, > > > > Fabio Estevam > Freescale P2020. Latest U-boot version. > > Easiest way to see it is typing mmcinfo at the U-boot cli. It will hang. > > By default, PIO mode is selected when CONFIG_P2020 is defined. Legacy > P2020 silicon revisions require PIO mode. > > The esdhc_pio_read_write function has a bad reg pointer. > Hi Jim, I tested this on my P2020, and PIO mode fails as you describe. Your fix works. I've attached a patch which is suitable for inclusion into U-Boot. Feel free to submit your own patch to supercede this one. It is a bug you found, you should get credit for it! :) It looks like the patch which introduced this code (77c1458d1 "ppc/85xx: PIO Support for FSL eSDHC Controller Driver") was carried out of tree for a while. While it was out of tree, another commit happened (c67bee146 "fsl_esdhc: add support for mx51 processor") which changed how the mmc->priv variable is used. From 91d7e1788b639602e62249f8db53412d913f4d35 Mon Sep 17 00:00:00 2001 From: Ira W. Snyder Date: Fri, 16 Dec 2011 09:48:19 -0800 Subject: [PATCH] fsl_esdhc: fix PIO mode transfers The pointer to the registers used to control the Freescale MMC controller is not initialized correctly when using PIO mode. This is fixed by initializing the pointer identically to all other usage in the driver. Examining the commit history shows that this was broken at introduction due to a code change in upstream U-Boot to support the mx51 processor family. Reported-by: Jim Lentz Signed-off-by: Ira W. Snyder --- Tested on the P2020COME board with PIO explicitly enabled via: #define CONFIG_SYS_FSL_ESDHC_USE_PIO drivers/mmc/fsl_esdhc.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index ec953f0..b56ddc65 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -113,7 +113,8 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) static void esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data) { - struct fsl_esdhc *regs = mmc->priv; + struct fsl_esdhc_cfg *cfg = mmc->priv; + struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; uint blocks; char *buffer; uint databuf;