Patchwork [U-Boot] fsl_esdhc.c bug

login
register
mail settings
Submitter Ira Snyder
Date Dec. 16, 2011, 6:06 p.m.
Message ID <20111216180648.GB13048@ovro.caltech.edu>
Download mbox | patch
Permalink /patch/131878/
State Accepted
Commit 8eee2bd7f484c4933c4e3112c3c3db886ac945ca
Headers show

Comments

Ira Snyder - Dec. 16, 2011, 6:06 p.m.
On Fri, Dec 16, 2011 at 09:53:20AM -0500, Jim Lentz wrote:
> On 12/16/2011 09:51 AM, Fabio Estevam wrote:
> > Hi Jim,
> >
> > On Fri, Dec 16, 2011 at 11:48 AM, Jim Lentz<JLentz@zhone.com>  wrote:
> >> All,
> >>
> >> There is a bug rendering SDCard support useless on Freescale esdhc
> >> controller.
> > Which Freescale processor do you use?
> >
> > Please describe in details the problem you see, how to reproduce it,
> > the U-boot version
> > that you use, etc.
> >
> > Regards,
> >
> > Fabio Estevam
> Freescale P2020. Latest U-boot version.
> 
> Easiest way to see it is typing mmcinfo at the U-boot cli. It will hang.
> 
> By default, PIO mode is selected when CONFIG_P2020 is defined. Legacy 
> P2020 silicon revisions require PIO mode.
> 
> The esdhc_pio_read_write function has a bad reg pointer.
> 

Hi Jim,

I tested this on my P2020, and PIO mode fails as you describe. Your fix
works. I've attached a patch which is suitable for inclusion into
U-Boot. Feel free to submit your own patch to supercede this one. It is
a bug you found, you should get credit for it! :)

It looks like the patch which introduced this code (77c1458d1 "ppc/85xx:
PIO Support for FSL eSDHC Controller Driver") was carried out of tree
for a while. While it was out of tree, another commit happened
(c67bee146 "fsl_esdhc: add support for mx51 processor") which changed
how the mmc->priv variable is used.


From 91d7e1788b639602e62249f8db53412d913f4d35 Mon Sep 17 00:00:00 2001
From: Ira W. Snyder <iws@ovro.caltech.edu>
Date: Fri, 16 Dec 2011 09:48:19 -0800
Subject: [PATCH] fsl_esdhc: fix PIO mode transfers

The pointer to the registers used to control the Freescale MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer identically to all other usage in the
driver.

Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.

Reported-by: Jim Lentz <JLentz@zhone.com>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
---

Tested on the P2020COME board with PIO explicitly enabled via:
#define CONFIG_SYS_FSL_ESDHC_USE_PIO

 drivers/mmc/fsl_esdhc.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

Patch

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index ec953f0..b56ddc65 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -113,7 +113,8 @@  uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
 static void
 esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
 {
-	struct fsl_esdhc *regs = mmc->priv;
+	struct fsl_esdhc_cfg *cfg = mmc->priv;
+	struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
 	uint blocks;
 	char *buffer;
 	uint databuf;