From patchwork Fri Dec 16 16:35:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Langsdorf X-Patchwork-Id: 131866 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CB09E1007D7 for ; Sat, 17 Dec 2011 03:41:01 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Rbaml-0004H8-GL; Fri, 16 Dec 2011 16:37:27 +0000 Received: from smtp171.iad.emailsrvr.com ([207.97.245.171]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Rbamf-0004Cu-1N for linux-arm-kernel@lists.infradead.org; Fri, 16 Dec 2011 16:37:22 +0000 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp57.relay.iad1a.emailsrvr.com (SMTP Server) with ESMTP id 8A7B2F8695; Fri, 16 Dec 2011 11:37:16 -0500 (EST) X-Virus-Scanned: OK Received: from smtp192.mex02.mlsrvr.com (smtp192.mex02.mlsrvr.com [204.232.137.43]) by smtp57.relay.iad1a.emailsrvr.com (SMTP Server) with ESMTPS id 1CC3CF85FB; Fri, 16 Dec 2011 11:37:16 -0500 (EST) Received: from IAD2MBX09.mex02.mlsrvr.com ([172.23.11.65]) by IAD2HUB07.mex02.mlsrvr.com ([172.23.10.71]) with mapi; Fri, 16 Dec 2011 11:37:14 -0500 From: Mark Langsdorf To: Richard Zhao , "linux-arm-kernel@lists.infradead.org" , "cpufreq@vger.kernel.org" , "devicetree-discuss@lists.ozlabs.org" Date: Fri, 16 Dec 2011 11:35:39 -0500 Subject: RE: [PATCH V2 3/4] arm/imx6q: register arm_clk as cpu to clkdev Thread-Topic: [PATCH V2 3/4] arm/imx6q: register arm_clk as cpu to clkdev Thread-Index: Acy73eKnuN0DSlGbRti4BpCXagWKGgAMtyIR Message-ID: <21672683C5A3814BB4DB938EBE482DE40A1AE8EF74@IAD2MBX09.mex02.mlsrvr.com> References: <1324031462-24961-1-git-send-email-richard.zhao@linaro.org>, <1324031462-24961-4-git-send-email-richard.zhao@linaro.org> In-Reply-To: <1324031462-24961-4-git-send-email-richard.zhao@linaro.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US x-tm-as-product-ver: SMEX-10.0.0.4152-6.800.1017-18586.004 x-tm-as-result: No--46.020400-8.000000-31 x-tm-as-user-approved-sender: No x-tm-as-user-blocked-sender: No MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: "linaro-dev@lists.linaro.org" , "patches@linaro.org" , "eric.miao@linaro.org" , "linux@arm.linux.org.uk" , "kernel@pengutronix.de" , "davej@redhat.com" , "shawn.guo@linaro.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Is there a portable/generic approach for other drivers that may want to use arm-cpufreq.c? arm_clk is not normally defined for my SoC and I don't see an easy way to pull it in. --Mark Langsdorf Calxeda, Inc. diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 039a7ab..72acbc2 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -1911,6 +1911,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk), _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk), _REGISTER_CLOCK(NULL, "sata_clk", sata_clk), + _REGISTER_CLOCK(NULL, "cpu", arm_clk), }; int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)