From patchwork Wed Dec 10 15:25:31 2008 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [1/2,MTD,NAND] pxa3xx: fix non-page-aligned reads Date: Wed, 10 Dec 2008 05:25:31 -0000 From: Eric Miao X-Patchwork-Id: 13174 Message-Id: To: linux-mtd Cc: David Woodhouse , ARM Linux >From 64957c00b7da6101a6b9aa221f6ae26a2e7d88b3 Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Tue, 18 Nov 2008 10:47:42 -0800 Subject: [PATCH] [MTD][NAND] pxa3xx: fix non-page-aligned reads Reads from non-page-aligned addresses were broken because while the address to read from was correctly written to NDCB*, a full page was always read. Fix this by ignoring the column and only using the page address. I suspect this whole-page behavior is due to the controller's need to read the entire page in order to generate correct ECC. In the non-ECC case this could be optimized to use the column address, and to set the read length to what is being requested rather than the length of an entire page. Signed-off-by: Matt Reimer Signed-off-by: Eric Miao --- drivers/mtd/nand/pxa3xx_nand.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) info->ndcb0 |= NDCB0_CMD_TYPE(1) | NDCB0_AUTO_RS; diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index ce5752a..b797c1c 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -367,14 +367,14 @@ static int prepare_read_prog_cmd(struct pxa3xx_nand_info *info, /* large block, 2 cycles for column address * row address starts from 3rd cycle */ - info->ndcb1 |= (page_addr << 16) | (column & 0xffff); + info->ndcb1 |= page_addr << 16; if (info->row_addr_cycles == 3) info->ndcb2 = (page_addr >> 16) & 0xff; } else /* small block, 1 cycles for column address * row address starts from 2nd cycle */ - info->ndcb1 = (page_addr << 8) | (column & 0xff); + info->ndcb1 = page_addr << 8; if (cmd == cmdset->program)