From patchwork Thu Dec 15 12:33:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 131580 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6B3321007D8 for ; Thu, 15 Dec 2011 23:34:14 +1100 (EST) Received: from localhost ([::1]:36443 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RbAVh-0002O6-UR for incoming@patchwork.ozlabs.org; Thu, 15 Dec 2011 07:34:05 -0500 Received: from eggs.gnu.org ([140.186.70.92]:35924) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RbAVN-0002Fi-TY for qemu-devel@nongnu.org; Thu, 15 Dec 2011 07:33:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RbAVJ-0000ai-2f for qemu-devel@nongnu.org; Thu, 15 Dec 2011 07:33:45 -0500 Received: from goliath.siemens.de ([192.35.17.28]:21416) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RbAVI-0000aG-JI for qemu-devel@nongnu.org; Thu, 15 Dec 2011 07:33:40 -0500 Received: from mail1.siemens.de (localhost [127.0.0.1]) by goliath.siemens.de (8.13.6/8.13.6) with ESMTP id pBFCXbTP000477; Thu, 15 Dec 2011 13:33:37 +0100 Received: from mchn199C.mchp.siemens.de ([139.25.109.49]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id pBFCXW5R003584; Thu, 15 Dec 2011 13:33:37 +0100 From: Jan Kiszka To: Avi Kivity , Marcelo Tosatti Date: Thu, 15 Dec 2011 13:33:30 +0100 Message-Id: <3b178012c7cc3ae2000bf6acd4ef55aaa3f57138.1323952403.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.28 Cc: Blue Swirl , Anthony Liguori , qemu-devel , kvm@vger.kernel.org, "Michael S. Tsirkin" Subject: [Qemu-devel] [PATCH v5 15/16] kvm: x86: Add user space part for in-kernel IOAPIC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This introduces the KVM-accelerated IOAPIC backend and extends the IRQ routing setup by the 0->2 redirection when needed. The IOAPIC gains a KVM-specific property that allows to define the GSI base for injecting interrupts into the kernel model. This will allow to disentangle PIC and IOAPIC pins for chipsets that support more sophisticated IRQ routes than the PIIX3. So far the base is kept at 0, i.e. PIC and IOAPIC share pins 0..15. Signed-off-by: Jan Kiszka --- Makefile.target | 2 +- hw/ioapic_common.c | 1 + hw/ioapic_internal.h | 1 + hw/kvm/ioapic.c | 101 ++++++++++++++++++++++++++++++++++++++++++++++++++ hw/pc_piix.c | 15 +++++++- 5 files changed, 118 insertions(+), 2 deletions(-) create mode 100644 hw/kvm/ioapic.c diff --git a/Makefile.target b/Makefile.target index fb10143..b48bb57 100644 --- a/Makefile.target +++ b/Makefile.target @@ -236,7 +236,7 @@ obj-i386-y += vmport.o obj-i386-y += device-hotplug.o pci-hotplug.o smbios.o wdt_ib700.o obj-i386-y += debugcon.o multiboot.o obj-i386-y += pc_piix.o -obj-i386-$(CONFIG_KVM) += kvm/clock.o kvm/apic.o kvm/i8259.o +obj-i386-$(CONFIG_KVM) += kvm/clock.o kvm/apic.o kvm/i8259.o kvm/ioapic.o obj-i386-$(CONFIG_SPICE) += qxl.o qxl-logger.o qxl-render.o # shared objects diff --git a/hw/ioapic_common.c b/hw/ioapic_common.c index 094551c..efc1d44 100644 --- a/hw/ioapic_common.c +++ b/hw/ioapic_common.c @@ -122,6 +122,7 @@ static SysBusDeviceInfo ioapic_info = { .qdev.no_user = 1, .qdev.props = (Property[]) { DEFINE_PROP_STRING("backend", IOAPICState, backend_name), + DEFINE_PROP_UINT32("kvm_gsi_base", IOAPICState, kvm_gsi_base, 0), DEFINE_PROP_END_OF_LIST(), }, }; diff --git a/hw/ioapic_internal.h b/hw/ioapic_internal.h index c5fab8b..bf63115 100644 --- a/hw/ioapic_internal.h +++ b/hw/ioapic_internal.h @@ -95,6 +95,7 @@ struct IOAPICState { char *backend_name; IOAPICBackend *backend; + uint32_t kvm_gsi_base; }; void ioapic_register_device(void); diff --git a/hw/kvm/ioapic.c b/hw/kvm/ioapic.c new file mode 100644 index 0000000..1e886d4 --- /dev/null +++ b/hw/kvm/ioapic.c @@ -0,0 +1,101 @@ +/* + * KVM in-kernel IOPIC support + * + * Copyright (c) 2011 Siemens AG + * + * Authors: + * Jan Kiszka + * + * This work is licensed under the terms of the GNU GPL version 2. + * See the COPYING file in the top-level directory. + */ + +#include "hw/pc.h" +#include "hw/ioapic_internal.h" +#include "hw/apic_internal.h" +#include "kvm.h" + +static void kvm_ioapic_get(IOAPICState *s) +{ + struct kvm_irqchip chip; + struct kvm_ioapic_state *kioapic; + int ret, i; + + chip.chip_id = KVM_IRQCHIP_IOAPIC; + ret = kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, &chip); + if (ret < 0) { + fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret)); + abort(); + } + + kioapic = &chip.chip.ioapic; + + s->id = kioapic->id; + s->ioregsel = kioapic->ioregsel; + s->irr = kioapic->irr; + for (i = 0; i < IOAPIC_NUM_PINS; i++) { + s->ioredtbl[i] = kioapic->redirtbl[i].bits; + } +} + +static void kvm_ioapic_put(IOAPICState *s) +{ + struct kvm_irqchip chip; + struct kvm_ioapic_state *kioapic; + int ret, i; + + chip.chip_id = KVM_IRQCHIP_IOAPIC; + kioapic = &chip.chip.ioapic; + + kioapic->id = s->id; + kioapic->ioregsel = s->ioregsel; + kioapic->base_address = s->busdev.mmio[0].addr; + kioapic->irr = s->irr; + for (i = 0; i < IOAPIC_NUM_PINS; i++) { + kioapic->redirtbl[i].bits = s->ioredtbl[i]; + } + + ret = kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, &chip); + if (ret < 0) { + fprintf(stderr, "KVM_GET_IRQCHIP failed: %s\n", strerror(ret)); + abort(); + } +} + +static void kvm_ioapic_reset(IOAPICState *s) +{ + ioapic_reset_internal(s); + + kvm_ioapic_put(s); +} + +static void kvm_ioapic_set_irq(void *opaque, int irq, int level) +{ + IOAPICState *s = opaque; + int delivered; + + delivered = kvm_irqchip_set_irq(kvm_state, s->kvm_gsi_base + irq, level); + apic_report_irq_delivered(delivered); +} + +static void kvm_ioapic_backend_init(IOAPICState *s, int index) +{ + memory_region_init_reservation(&s->io_memory, "kvm-ioapic", 0x1000); + + qdev_init_gpio_in(&s->busdev.qdev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS); +} + +static IOAPICBackend kvm_ioapic_backend = { + .name = "KVM", + .init = kvm_ioapic_backend_init, + .reset = kvm_ioapic_reset, + .pre_save = kvm_ioapic_get, + .post_load = kvm_ioapic_put, +}; + +static void kvm_ioapic_register(void) +{ + ioapic_register_backend(&kvm_ioapic_backend); +} + +device_init(kvm_ioapic_register) diff --git a/hw/pc_piix.c b/hw/pc_piix.c index 8650319..93d0eba 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -68,6 +68,15 @@ static void kvm_piix3_setup_irq_routing(bool pci_enabled) for (i = 8; i < 16; ++i) { kvm_irqchip_add_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8); } + if (pci_enabled) { + for (i = 0; i < 24; ++i) { + if (i == 0) { + kvm_irqchip_add_route(s, i, KVM_IRQCHIP_IOAPIC, 2); + } else if (i != 2) { + kvm_irqchip_add_route(s, i, KVM_IRQCHIP_IOAPIC, i); + } + } + } ret = kvm_irqchip_commit_routes(s); if (ret < 0) { hw_error("KVM IRQ routing setup failed"); @@ -89,12 +98,16 @@ static void kvm_piix3_gsi_handler(void *opaque, int n, int level) static void ioapic_init(GSIState *gsi_state) { + const char *backend = "QEMU"; DeviceState *dev; SysBusDevice *d; unsigned int i; dev = qdev_create(NULL, "ioapic"); - qdev_prop_set_string(dev, "backend", g_strdup("QEMU")); + if (kvm_enabled() && kvm_irqchip_in_kernel()) { + backend = "KVM"; + } + qdev_prop_set_string(dev, "backend", g_strdup(backend)); qdev_init_nofail(dev); d = sysbus_from_qdev(dev); sysbus_mmio_map(d, 0, 0xfec00000);