From patchwork Wed Dec 14 14:32:07 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 131398 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 463511007D7 for ; Thu, 15 Dec 2011 01:42:06 +1100 (EST) Received: from localhost ([::1]:33441 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RaptC-0003GV-UM for incoming@patchwork.ozlabs.org; Wed, 14 Dec 2011 09:32:58 -0500 Received: from eggs.gnu.org ([140.186.70.92]:40084) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rapsc-0001Ig-Dg for qemu-devel@nongnu.org; Wed, 14 Dec 2011 09:32:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RapsW-0004bG-GM for qemu-devel@nongnu.org; Wed, 14 Dec 2011 09:32:22 -0500 Received: from mail-ww0-f53.google.com ([74.125.82.53]:50277) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RapsW-0004as-AK for qemu-devel@nongnu.org; Wed, 14 Dec 2011 09:32:16 -0500 Received: by wgbds1 with SMTP id ds1so1654548wgb.10 for ; Wed, 14 Dec 2011 06:32:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=51XEVTbJkg75S7JrOKaD8t1NgV5x4Bla1NC3nMQ+j4w=; b=sXW7UvG8dePQ1M1CeTvccb1nzNIYngZ1/eskkZpAJcR1pxwgZlRUahYlBTCmYQ/VBt EUj1JrHUrlLINQS8vc3svwqp8+jqV65eVrgtw9c7Gmzap76nYLvOo+RlKrhEe3oKCoaY ZFnrDtIVI1mKL4YUhuWRIcCMDpj0GXPl+JcPc= Received: by 10.227.206.78 with SMTP id ft14mr2389517wbb.24.1323873135449; Wed, 14 Dec 2011 06:32:15 -0800 (PST) Received: from Laure.box.in.chocolate-blue.net ([109.190.18.76]) by mx.google.com with ESMTPS id ej17sm4091205wbb.14.2011.12.14.06.32.14 (version=SSLv3 cipher=OTHER); Wed, 14 Dec 2011 06:32:14 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Wed, 14 Dec 2011 15:32:07 +0100 Message-Id: <1323873129-29742-2-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.7.4 In-Reply-To: <1323873129-29742-1-git-send-email-benoit.canet@gmail.com> References: <1323873129-29742-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.82.53 Cc: peter.maydell@linaro.org, =?UTF-8?q?Beno=C3=AEt=20Canet?= , agraf@suse.de Subject: [Qemu-devel] [PATCH v2 1/3] sh_pci: remove sysbus_init_mmio_cb2 usage X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The isa region is not exposed as a sysbus region because the iobr register contains its address and use it to remap dynamically the region. (Peter Maydell's idea) Signed-off-by: Benoît Canet --- hw/r2d.c | 14 ++++++++++++-- hw/sh_pci.c | 29 ++++------------------------- 2 files changed, 16 insertions(+), 27 deletions(-) diff --git a/hw/r2d.c b/hw/r2d.c index 9b6fcba..6e1f71c 100644 --- a/hw/r2d.c +++ b/hw/r2d.c @@ -231,6 +231,8 @@ static void r2d_init(ram_addr_t ram_size, qemu_irq *irq; DriveInfo *dinfo; int i; + DeviceState *dev; + SysBusDevice *busdev; MemoryRegion *address_space_mem = get_system_memory(); if (!cpu_model) @@ -252,8 +254,16 @@ static void r2d_init(ram_addr_t ram_size, /* Register peripherals */ s = sh7750_init(env, address_space_mem); irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); - sysbus_create_varargs("sh_pci", 0x1e200000, irq[PCI_INTA], irq[PCI_INTB], - irq[PCI_INTC], irq[PCI_INTD], NULL); + + dev = qdev_create(NULL, "sh_pci"); + busdev = sysbus_from_qdev(dev); + qdev_init_nofail(dev); + sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000)); + sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000)); + sysbus_connect_irq(busdev, 0, irq[PCI_INTA]); + sysbus_connect_irq(busdev, 1, irq[PCI_INTB]); + sysbus_connect_irq(busdev, 2, irq[PCI_INTC]); + sysbus_connect_irq(busdev, 3, irq[PCI_INTD]); sm501_init(address_space_mem, 0x10000000, SM501_VRAM_SIZE, irq[SM501], serial_hds[2]); diff --git a/hw/sh_pci.c b/hw/sh_pci.c index 86f468e..d4d028d 100644 --- a/hw/sh_pci.c +++ b/hw/sh_pci.c @@ -110,29 +110,6 @@ static void sh_pci_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(pic[irq_num], level); } -static void sh_pci_map(SysBusDevice *dev, target_phys_addr_t base) -{ - SHPCIState *s = FROM_SYSBUS(SHPCIState, dev); - - memory_region_add_subregion(get_system_memory(), - P4ADDR(base), - &s->memconfig_p4); - memory_region_add_subregion(get_system_memory(), - A7ADDR(base), - &s->memconfig_a7); - s->iobr = 0xfe240000; - memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa); -} - -static void sh_pci_unmap(SysBusDevice *dev, target_phys_addr_t base) -{ - SHPCIState *s = FROM_SYSBUS(SHPCIState, dev); - - memory_region_del_subregion(get_system_memory(), &s->memconfig_p4); - memory_region_del_subregion(get_system_memory(), &s->memconfig_a7); - memory_region_del_subregion(get_system_memory(), &s->isa); -} - static int sh_pci_init_device(SysBusDevice *dev) { SHPCIState *s; @@ -153,9 +130,11 @@ static int sh_pci_init_device(SysBusDevice *dev) memory_region_init_alias(&s->memconfig_a7, "sh_pci.2", &s->memconfig_p4, 0, 0x224); isa_mmio_setup(&s->isa, 0x40000); - sysbus_init_mmio_cb2(dev, sh_pci_map, sh_pci_unmap); + sysbus_init_mmio(dev, &s->memconfig_p4); sysbus_init_mmio(dev, &s->memconfig_a7); - sysbus_init_mmio(dev, &s->isa); + s->iobr = 0xfe240000; + memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa); + s->dev = pci_create_simple(s->bus, PCI_DEVFN(0, 0), "sh_pci_host"); return 0; }