From patchwork Tue Dec 13 14:13:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eric Benard X-Patchwork-Id: 131107 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6CAEC1007D3 for ; Wed, 14 Dec 2011 01:16:04 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RaT6p-0000vh-GH; Tue, 13 Dec 2011 14:13:31 +0000 Received: from smtp2-g21.free.fr ([2a01:e0c:1:1599::11]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RaT6l-0000ue-6w for linux-arm-kernel@lists.infradead.org; Tue, 13 Dec 2011 14:13:28 +0000 Received: from e6520eb.lan (unknown [82.240.38.71]) by smtp2-g21.free.fr (Postfix) with ESMTP id CF7B14B0408; Tue, 13 Dec 2011 15:13:20 +0100 (CET) From: =?UTF-8?q?Eric=20B=C3=A9nard?= To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 09/19] clock-imx35: fix reboot in internal boot mode Date: Tue, 13 Dec 2011 15:13:19 +0100 Message-Id: <1323785599-22763-1-git-send-email-eric@eukrea.com> X-Mailer: git-send-email 1.7.6.4 In-Reply-To: <20111213100041.GG27267@pengutronix.de> References: <20111213100041.GG27267@pengutronix.de> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Russell King , Jason Liu , open list , Sascha Hauer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org commit 8d75a26 "ARM: mx35: use generic function for displaying silicon revision" disabled IIM clock after reading silicon revision which will prevent reboot in internal boot mode. Signed-off-by: Eric Bénard Cc: Jason Liu Cc: Sascha Hauer --- v2: improve comment and code based on Sascha & Sergei's comments arch/arm/mach-imx/clock-imx35.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c index 8116f11..ac8238c 100644 --- a/arch/arm/mach-imx/clock-imx35.c +++ b/arch/arm/mach-imx/clock-imx35.c @@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = { int __init mx35_clocks_init() { - unsigned int cgr2 = 3 << 26, cgr3 = 0; + unsigned int cgr2 = 3 << 26; #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) cgr2 |= 3 << 16; @@ -521,6 +521,12 @@ int __init mx35_clocks_init() __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), CCM_BASE + CCM_CGR1); + __raw_writel(cgr2, CCM_BASE + CCM_CGR2); + __raw_writel(0, CCM_BASE + CCM_CGR3); + + clk_enable(&iim_clk); + imx_print_silicon_rev("i.MX35", mx35_revision()); + clk_disable(&iim_clk); /* * Check if we came up in internal boot mode. If yes, we need some @@ -529,17 +535,11 @@ int __init mx35_clocks_init() */ if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { /* Additionally turn on UART1, SCC, and IIM clocks */ - cgr2 |= 3 << 16 | 3 << 4; - cgr3 |= 3 << 2; + clk_enable(&iim_clk); + clk_enable(&uart1_clk); + clk_enable(&scc_clk); } - __raw_writel(cgr2, CCM_BASE + CCM_CGR2); - __raw_writel(cgr3, CCM_BASE + CCM_CGR3); - - clk_enable(&iim_clk); - imx_print_silicon_rev("i.MX35", mx35_revision()); - clk_disable(&iim_clk); - #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(&epit1_clk, MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);