Patchwork [v3,3/3] ivshmem: update the spec

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Submitter zanghongyong@huawei.com
Date Dec. 13, 2011, 1:42 a.m.
Message ID <1323740568-17692-4-git-send-email-zanghongyong@huawei.com>
Download mbox | patch
Permalink /patch/130971/
State New
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zanghongyong@huawei.com - Dec. 13, 2011, 1:42 a.m.
From: Hongyong Zang <zanghongyong@huawei.com>


Signed-off-by: Hongyong Zang <zanghongyong@huawei.com>
---
 docs/specs/ivshmem_device_spec.txt |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

Patch

diff --git a/docs/specs/ivshmem_device_spec.txt b/docs/specs/ivshmem_device_spec.txt
index 23dd2ba..d36c737 100644
--- a/docs/specs/ivshmem_device_spec.txt
+++ b/docs/specs/ivshmem_device_spec.txt
@@ -13,10 +13,14 @@  The Inter-VM PCI device
 
 *BARs*
 
-The device supports three BARs.  BAR0 is a 1 Kbyte MMIO region to support
+The device supports four BARs.  BAR0 is a 1 Kbyte MMIO region to support
 registers.  BAR1 is used for MSI-X when it is enabled in the device.  BAR2 is
 used to map the shared memory object from the host.  The size of BAR2 is
 specified when the guest is started and must be a power of 2 in size.
+BAR4 is a 16 bytes PIO region to support registers. BAR4 plays the same role
+as BAR0, while it reduces notifying time 30% in comparison with BAR0. For
+compatibility, BAR4 will be not visible on guests created with -M pc-1.0 or
+below.
 
 *Registers*
 
@@ -89,7 +93,7 @@  Usage in the Guest
 ------------------
 
 The shared memory device is intended to be used with the provided UIO driver.
-Very little configuration is needed.  The guest should map BAR0 to access the
+Very little configuration is needed.  The guest should map BAR0 or BAR4 to access the
 registers (an array of 32-bit ints allows simple writing) and map BAR2 to
 access the shared memory region itself.  The size of the shared memory region
 is specified when the guest (or shared memory server) is started.  A guest may