Patchwork [v3,1/2] ARM: pl2x0/pl310: Refactor Kconfig to be more maintainable

login
register
mail settings
Submitter Dave Martin
Date Dec. 12, 2011, 11:47 a.m.
Message ID <1323690426-6267-2-git-send-email-dave.martin@linaro.org>
Download mbox | patch
Permalink /patch/130730/
State New
Headers show

Comments

Dave Martin - Dec. 12, 2011, 11:47 a.m.
Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs)
is bothersome to maintain and likely to lead to merge conflicts.

This patch moves the knowledge of which platforms have a L2x0 or
PL310 cache controller to the individual machines.  To enable this,
a new HAVE_L2X0_L2CC config option is introduced to allow machines
to indicate that they have such a cache controller independently of
each other.

Boards/SoCs which cannot reliably operate without the L2 cache
controller support should select is directly from their own
Kconfigs instead.  This applies to some TrustZone-enabled boards
where Linux runs in the Normal World.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
---
Changes since v1:

v3: no change (patch reposted as part of an extended series)

v2: Respond to issues raised by Rob Herring:

    Get config dependencies into something resembling alphabetical
    order.
    
    Depend directly on CACHE_L2X0 from boards which run Linux in the
    Normal World and hence where the L2CC can't be turned off by Linux.
    Currently done for OMAP4, EXYNOS4.
    
    Get rid of redundant "default n" for HAVE_L2X0_L2CC

 arch/arm/Kconfig               |    8 ++++++++
 arch/arm/mach-exynos/Kconfig   |    1 +
 arch/arm/mach-imx/Kconfig      |    2 +-
 arch/arm/mach-omap2/Kconfig    |    1 +
 arch/arm/mach-realview/Kconfig |    5 +++++
 arch/arm/mach-vexpress/Kconfig |    1 +
 arch/arm/mm/Kconfig            |   12 +++++++-----
 arch/arm/plat-mxc/Kconfig      |    1 +
 8 files changed, 25 insertions(+), 6 deletions(-)
Russell King - ARM Linux - Dec. 12, 2011, 2:08 p.m.
On Mon, Dec 12, 2011 at 11:47:05AM +0000, Dave Martin wrote:
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 724ec0f..c4c9acf 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -17,6 +17,7 @@ choice
>  
>  config ARCH_EXYNOS4
>  	bool "SAMSUNG EXYNOS4"
> +	select CACHE_L2X0

Doesn't this need to select HAVE_L2X0_L2CC as well?

> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index 5f7f9c2..4234937 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -609,12 +609,12 @@ comment "i.MX6 family:"
>  config SOC_IMX6Q
>  	bool "i.MX6 Quad support"
>  	select ARM_GIC
> -	select CACHE_L2X0
>  	select CPU_V7
>  	select HAVE_ARM_SCU
>  	select HAVE_IMX_GPC
>  	select HAVE_IMX_MMDC
>  	select HAVE_IMX_SRC
> +	select HAVE_L2X0_L2CC

Do you know enough about this to make L2 cache support optional on this SoC?

> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index 5034147..0358159 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -44,6 +44,7 @@ config ARCH_OMAP4
>  	select CPU_V7
>  	select ARM_GIC
>  	select LOCAL_TIMERS if SMP
> +	select CACHE_L2X0

HAVE_L2X0_L2CC ?
Dave Martin - Dec. 12, 2011, 3:01 p.m.
On Mon, Dec 12, 2011 at 02:08:37PM +0000, Russell King - ARM Linux wrote:
> On Mon, Dec 12, 2011 at 11:47:05AM +0000, Dave Martin wrote:
> > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> > index 724ec0f..c4c9acf 100644
> > --- a/arch/arm/mach-exynos/Kconfig
> > +++ b/arch/arm/mach-exynos/Kconfig
> > @@ -17,6 +17,7 @@ choice
> >  
> >  config ARCH_EXYNOS4
> >  	bool "SAMSUNG EXYNOS4"
> > +	select CACHE_L2X0
> 
> Doesn't this need to select HAVE_L2X0_L2CC as well?

Probably not -- due to a moment of madness, it looks like I somehow
mistranslated "highbank" as "exynos4".

For highbank, Rob Herring thinks that direct selection of CACHE_L2X0 is
needed [1].

I will re-roll the patch to fix this.


This may apply to other platforms too; but if they are not already
selecting CACHE_L2X0 directly, this series will make the situation no
worse.

> > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> > index 5f7f9c2..4234937 100644
> > --- a/arch/arm/mach-imx/Kconfig
> > +++ b/arch/arm/mach-imx/Kconfig
> > @@ -609,12 +609,12 @@ comment "i.MX6 family:"
> >  config SOC_IMX6Q
> >  	bool "i.MX6 Quad support"
> >  	select ARM_GIC
> > -	select CACHE_L2X0
> >  	select CPU_V7
> >  	select HAVE_ARM_SCU
> >  	select HAVE_IMX_GPC
> >  	select HAVE_IMX_MMDC
> >  	select HAVE_IMX_SRC
> > +	select HAVE_L2X0_L2CC
> 
> Do you know enough about this to make L2 cache support optional on this SoC?

No.  But Shawn Guo suggested that this correct [2]
 
> > diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> > index 5034147..0358159 100644
> > --- a/arch/arm/mach-omap2/Kconfig
> > +++ b/arch/arm/mach-omap2/Kconfig
> > @@ -44,6 +44,7 @@ config ARCH_OMAP4
> >  	select CPU_V7
> >  	select ARM_GIC
> >  	select LOCAL_TIMERS if SMP
> > +	select CACHE_L2X0
> 
> HAVE_L2X0_L2CC ?

Rob Herring thinks not [1]

Cheers
---Dave


[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074495.html
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074602.html
Dave Martin - Dec. 12, 2011, 3:19 p.m.
On Mon, Dec 12, 2011 at 02:08:37PM +0000, Russell King - ARM Linux wrote:
> On Mon, Dec 12, 2011 at 11:47:05AM +0000, Dave Martin wrote:
> > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> > index 724ec0f..c4c9acf 100644
> > --- a/arch/arm/mach-exynos/Kconfig
> > +++ b/arch/arm/mach-exynos/Kconfig
> > @@ -17,6 +17,7 @@ choice
> >  
> >  config ARCH_EXYNOS4
> >  	bool "SAMSUNG EXYNOS4"
> > +	select CACHE_L2X0
> 
> Doesn't this need to select HAVE_L2X0_L2CC as well?
> 
> > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> > index 5f7f9c2..4234937 100644
> > --- a/arch/arm/mach-imx/Kconfig
> > +++ b/arch/arm/mach-imx/Kconfig
> > @@ -609,12 +609,12 @@ comment "i.MX6 family:"
> >  config SOC_IMX6Q
> >  	bool "i.MX6 Quad support"
> >  	select ARM_GIC
> > -	select CACHE_L2X0
> >  	select CPU_V7
> >  	select HAVE_ARM_SCU
> >  	select HAVE_IMX_GPC
> >  	select HAVE_IMX_MMDC
> >  	select HAVE_IMX_SRC
> > +	select HAVE_L2X0_L2CC
> 
> Do you know enough about this to make L2 cache support optional on this SoC?
> 
> > diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> > index 5034147..0358159 100644
> > --- a/arch/arm/mach-omap2/Kconfig
> > +++ b/arch/arm/mach-omap2/Kconfig
> > @@ -44,6 +44,7 @@ config ARCH_OMAP4
> >  	select CPU_V7
> >  	select ARM_GIC
> >  	select LOCAL_TIMERS if SMP
> > +	select CACHE_L2X0
> 
> HAVE_L2X0_L2CC ?

I've just asked Rob this, but you may have a view --

Should we avoid changing any actual behaviour in this patch?

If so then yes, we should add HAVE_L2X0_L2CC for everything previously
depended on by CACHE_L2X0.

If this is actually wrong, and not building the L2x0 support for certain
boards doesn't make sense (as seems to be the case for some boards),
then it would be up to those boards' maintainers to fix that in
subsequent patches if they care about it.

Alternatively, I could add the extra "select CACHE_L2X0" modifications
in a separate patch and append it to the series (contingent of Acks from
the relevant maintainers).  Either route seems preferable to doing those
changes in a patch which claims just to be refactoring.

Cheers
---Dave
Russell King - ARM Linux - Dec. 12, 2011, 4:04 p.m.
On Mon, Dec 12, 2011 at 03:01:58PM +0000, Dave Martin wrote:
> On Mon, Dec 12, 2011 at 02:08:37PM +0000, Russell King - ARM Linux wrote:
> > On Mon, Dec 12, 2011 at 11:47:05AM +0000, Dave Martin wrote:
> > > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> > > index 724ec0f..c4c9acf 100644
> > > --- a/arch/arm/mach-exynos/Kconfig
> > > +++ b/arch/arm/mach-exynos/Kconfig
> > > @@ -17,6 +17,7 @@ choice
> > >  
> > >  config ARCH_EXYNOS4
> > >  	bool "SAMSUNG EXYNOS4"
> > > +	select CACHE_L2X0
> > 
> > Doesn't this need to select HAVE_L2X0_L2CC as well?
> 
> Probably not -- due to a moment of madness, it looks like I somehow
> mistranslated "highbank" as "exynos4".

Well, you have CACHE_L2X0 depending on HAVE_L2X0_L2CC.  Selecting
CACHE_L2X0 without HAVE_L2X0_L2CC being selected will make Kconfig
produce a message about unmet dependencies.

The other solution to this is:

config CACHE_L2X0
	bool "Enable the L2x0 outer cache controller" if HAVE_L2X0_L2CC

and I think that's more in keeping with what Rob mentioned in his
message - it makes this a non-user selectable option unless
HAVE_L2X0_L2CC is enabled.

However, in this case it would be more sensible to name the option
'MIGHT_HAVE_CACHE_L2X0'.  (btw, please name the option after the
option it relates to.)

> > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> > > index 5f7f9c2..4234937 100644
> > > --- a/arch/arm/mach-imx/Kconfig
> > > +++ b/arch/arm/mach-imx/Kconfig
> > > @@ -609,12 +609,12 @@ comment "i.MX6 family:"
> > >  config SOC_IMX6Q
> > >  	bool "i.MX6 Quad support"
> > >  	select ARM_GIC
> > > -	select CACHE_L2X0
> > >  	select CPU_V7
> > >  	select HAVE_ARM_SCU
> > >  	select HAVE_IMX_GPC
> > >  	select HAVE_IMX_MMDC
> > >  	select HAVE_IMX_SRC
> > > +	select HAVE_L2X0_L2CC
> > 
> > Do you know enough about this to make L2 cache support optional on this SoC?
> 
> No.  But Shawn Guo suggested that this correct [2]

Ok.
Dave Martin - Dec. 12, 2011, 4:53 p.m.
On Mon, Dec 12, 2011 at 04:04:37PM +0000, Russell King - ARM Linux wrote:
> On Mon, Dec 12, 2011 at 03:01:58PM +0000, Dave Martin wrote:
> > On Mon, Dec 12, 2011 at 02:08:37PM +0000, Russell King - ARM Linux wrote:
> > > On Mon, Dec 12, 2011 at 11:47:05AM +0000, Dave Martin wrote:
> > > > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> > > > index 724ec0f..c4c9acf 100644
> > > > --- a/arch/arm/mach-exynos/Kconfig
> > > > +++ b/arch/arm/mach-exynos/Kconfig
> > > > @@ -17,6 +17,7 @@ choice
> > > >  
> > > >  config ARCH_EXYNOS4
> > > >  	bool "SAMSUNG EXYNOS4"
> > > > +	select CACHE_L2X0
> > > 
> > > Doesn't this need to select HAVE_L2X0_L2CC as well?
> > 
> > Probably not -- due to a moment of madness, it looks like I somehow
> > mistranslated "highbank" as "exynos4".
> 
> Well, you have CACHE_L2X0 depending on HAVE_L2X0_L2CC.  Selecting
> CACHE_L2X0 without HAVE_L2X0_L2CC being selected will make Kconfig
> produce a message about unmet dependencies.
> 
> The other solution to this is:
> 
> config CACHE_L2X0
> 	bool "Enable the L2x0 outer cache controller" if HAVE_L2X0_L2CC
> 
> and I think that's more in keeping with what Rob mentioned in his
> message - it makes this a non-user selectable option unless
> HAVE_L2X0_L2CC is enabled.
> 
> However, in this case it would be more sensible to name the option
> 'MIGHT_HAVE_CACHE_L2X0'.  (btw, please name the option after the
> option it relates to.)

We still want CACHE_L2X0 to default to y even in the
MIGHT_HAVE_CACHE_L2X0 case, since it is not usually desirable to turn it
off except for debugging purposes.

Would the correct thing be:

config CACHE_L2X0
	bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
	default MIGHT_HAVE_CACHE_L2X0

That way, select CACHE_L2X0=y, MIGHT_HAVE_CACHE_L2X0=y and both=y will
all produce sensible results, if I understand correctly how this works.

...or is there a better way?


In the meantime, I will separate the pure refactoring from the other
changes.

Cheers
---Dave
Russell King - ARM Linux - Dec. 12, 2011, 10:22 p.m.
On Mon, Dec 12, 2011 at 04:53:23PM +0000, Dave Martin wrote:
> On Mon, Dec 12, 2011 at 04:04:37PM +0000, Russell King - ARM Linux wrote:
> > On Mon, Dec 12, 2011 at 03:01:58PM +0000, Dave Martin wrote:
> > > On Mon, Dec 12, 2011 at 02:08:37PM +0000, Russell King - ARM Linux wrote:
> > > > On Mon, Dec 12, 2011 at 11:47:05AM +0000, Dave Martin wrote:
> > > > > diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> > > > > index 724ec0f..c4c9acf 100644
> > > > > --- a/arch/arm/mach-exynos/Kconfig
> > > > > +++ b/arch/arm/mach-exynos/Kconfig
> > > > > @@ -17,6 +17,7 @@ choice
> > > > >  
> > > > >  config ARCH_EXYNOS4
> > > > >  	bool "SAMSUNG EXYNOS4"
> > > > > +	select CACHE_L2X0
> > > > 
> > > > Doesn't this need to select HAVE_L2X0_L2CC as well?
> > > 
> > > Probably not -- due to a moment of madness, it looks like I somehow
> > > mistranslated "highbank" as "exynos4".
> > 
> > Well, you have CACHE_L2X0 depending on HAVE_L2X0_L2CC.  Selecting
> > CACHE_L2X0 without HAVE_L2X0_L2CC being selected will make Kconfig
> > produce a message about unmet dependencies.
> > 
> > The other solution to this is:
> > 
> > config CACHE_L2X0
> > 	bool "Enable the L2x0 outer cache controller" if HAVE_L2X0_L2CC
> > 
> > and I think that's more in keeping with what Rob mentioned in his
> > message - it makes this a non-user selectable option unless
> > HAVE_L2X0_L2CC is enabled.
> > 
> > However, in this case it would be more sensible to name the option
> > 'MIGHT_HAVE_CACHE_L2X0'.  (btw, please name the option after the
> > option it relates to.)
> 
> We still want CACHE_L2X0 to default to y even in the
> MIGHT_HAVE_CACHE_L2X0 case, since it is not usually desirable to turn it
> off except for debugging purposes.
> 
> Would the correct thing be:
> 
> config CACHE_L2X0
> 	bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
> 	default MIGHT_HAVE_CACHE_L2X0
> 
> That way, select CACHE_L2X0=y, MIGHT_HAVE_CACHE_L2X0=y and both=y will
> all produce sensible results, if I understand correctly how this works.
> 
> ...or is there a better way?

I think that's a good compromise (and improvement).

Patch

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789ef..a7e621e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -344,6 +344,7 @@  config ARCH_HIGHBANK
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
 	select HAVE_ARM_SCU
+	select HAVE_L2X0_L2CC
 	select USE_OF
 	help
 	  Support for the Calxeda Highbank SoC based boards.
@@ -361,6 +362,7 @@  config ARCH_CNS3XXX
 	select CPU_V6K
 	select GENERIC_CLOCKEVENTS
 	select ARM_GIC
+	select HAVE_L2X0_L2CC
 	select MIGHT_HAVE_PCI
 	select PCI_DOMAINS if PCI
 	help
@@ -377,6 +379,7 @@  config ARCH_GEMINI
 config ARCH_PRIMA2
 	bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 	select CPU_V7
+	select HAVE_L2X0_L2CC
 	select NO_IOPORT
 	select GENERIC_CLOCKEVENTS
 	select CLKDEV_LOOKUP
@@ -632,6 +635,7 @@  config ARCH_TEGRA
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select HAVE_L2X0_L2CC
 	select HAVE_SCHED_CLOCK
 	select ARCH_HAS_CPUFREQ
 	help
@@ -701,6 +705,7 @@  config ARCH_SHMOBILE
 	bool "Renesas SH-Mobile / R-Mobile"
 	select HAVE_CLK
 	select CLKDEV_LOOKUP
+	select HAVE_L2X0_L2CC
 	select HAVE_MACH_CLKDEV
 	select GENERIC_CLOCKEVENTS
 	select NO_IOPORT
@@ -900,6 +905,7 @@  config ARCH_U8500
 	bool "ST-Ericsson U8500 Series"
 	select CPU_V7
 	select ARM_AMBA
+	select HAVE_L2X0_L2CC
 	select GENERIC_CLOCKEVENTS
 	select CLKDEV_LOOKUP
 	select ARCH_REQUIRE_GPIOLIB
@@ -912,6 +918,7 @@  config ARCH_NOMADIK
 	select ARM_AMBA
 	select ARM_VIC
 	select CPU_ARM926T
+	select HAVE_L2X0_L2CC
 	select CLKDEV_LOOKUP
 	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
@@ -972,6 +979,7 @@  config ARCH_ZYNQ
 	select CLKDEV_LOOKUP
 	select ARM_GIC
 	select ARM_AMBA
+	select HAVE_L2X0_L2CC
 	select ICST
 	select USE_OF
 	help
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 724ec0f..c4c9acf 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -17,6 +17,7 @@  choice
 
 config ARCH_EXYNOS4
 	bool "SAMSUNG EXYNOS4"
+	select CACHE_L2X0
 	help
 	  Samsung EXYNOS4 SoCs based systems
 
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2..4234937 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -609,12 +609,12 @@  comment "i.MX6 family:"
 config SOC_IMX6Q
 	bool "i.MX6 Quad support"
 	select ARM_GIC
-	select CACHE_L2X0
 	select CPU_V7
 	select HAVE_ARM_SCU
 	select HAVE_IMX_GPC
 	select HAVE_IMX_MMDC
 	select HAVE_IMX_SRC
+	select HAVE_L2X0_L2CC
 	select USE_OF
 
 	help
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 5034147..0358159 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -44,6 +44,7 @@  config ARCH_OMAP4
 	select CPU_V7
 	select ARM_GIC
 	select LOCAL_TIMERS if SMP
+	select CACHE_L2X0
 	select PL310_ERRATA_588369
 	select PL310_ERRATA_727915
 	select ARM_ERRATA_720789
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index dba6d0c..3dfd6b8 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -12,6 +12,7 @@  config REALVIEW_EB_A9MP
 	bool "Support Multicore Cortex-A9 Tile"
 	depends on MACH_REALVIEW_EB
 	select CPU_V7
+	select HAVE_L2X0_L2CC
 	help
 	  Enable support for the Cortex-A9MPCore tile fitted to the
 	  Realview(R) Emulation Baseboard platform.
@@ -20,6 +21,7 @@  config REALVIEW_EB_ARM11MP
 	bool "Support ARM11MPCore Tile"
 	depends on MACH_REALVIEW_EB
 	select CPU_V6K
+	select HAVE_L2X0_L2CC
 	select ARCH_HAS_BARRIERS if SMP
 	help
 	  Enable support for the ARM11MPCore tile fitted to the Realview(R)
@@ -38,6 +40,7 @@  config MACH_REALVIEW_PB11MP
 	bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
 	select CPU_V6K
 	select ARM_GIC
+	select HAVE_L2X0_L2CC
 	select HAVE_PATA_PLATFORM
 	select ARCH_HAS_BARRIERS if SMP
 	help
@@ -50,6 +53,7 @@  config MACH_REALVIEW_PB1176
 	bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
 	select CPU_V6
 	select ARM_GIC
+	select HAVE_L2X0_L2CC
 	select HAVE_TCM
 	help
 	  Include support for the ARM(R) RealView(R) Platform Baseboard for
@@ -77,6 +81,7 @@  config MACH_REALVIEW_PBA8
 config MACH_REALVIEW_PBX
 	bool "Support RealView(R) Platform Baseboard Explore"
 	select ARM_GIC
+	select HAVE_L2X0_L2CC
 	select HAVE_PATA_PLATFORM
 	select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
 	select ZONE_DMA if SPARSEMEM
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 9311484..d9f387e 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -8,5 +8,6 @@  config ARCH_VEXPRESS_CA9X4
 	select ARM_ERRATA_720789
 	select ARM_ERRATA_751472
 	select ARM_ERRATA_753970
+	select HAVE_L2X0_L2CC
 
 endmenu
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 67f75a0..6e9e3e1 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -816,13 +816,15 @@  config CACHE_FEROCEON_L2_WRITETHROUGH
 	  Say Y here to use the Feroceon L2 cache in writethrough mode.
 	  Unless you specifically require this, say N for writeback mode.
 
+config HAVE_L2X0_L2CC
+	bool
+	help
+	  This option should be selected by machines which have a L2x0
+	  or PL310 cache controller.
+
 config CACHE_L2X0
 	bool "Enable the L2x0 outer cache controller"
-	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-		   REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
-		   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
-		   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
-		   ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
+	depends on HAVE_L2X0_L2CC
 	default y
 	select OUTER_CACHE
 	select OUTER_CACHE_SYNC
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b3a1f2b..6871ed7 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -20,6 +20,7 @@  config ARCH_IMX_V6_V7
 	bool "i.MX3, i.MX6"
 	select AUTO_ZRELADDR if !ZBOOT_ROM
 	select ARM_PATCH_PHYS_VIRT
+	select HAVE_L2X0_L2CC
 	help
 	  This enables support for systems based on the Freescale i.MX3 and i.MX6
 	  family.