@@ -3396,6 +3396,8 @@ static inline void gen_intermediate_code_internal(CPUState *env,
tcg_gen_debug_insn_start(ctx.pc);
}
+ gen_helper_trace_vfetch(ctx.pc);
+
insn = ldl_code(ctx.pc);
num_insns++;
@@ -9972,6 +9972,8 @@ static inline void gen_intermediate_code_internal(CPUState *env,
tcg_gen_debug_insn_start(dc->pc);
}
+ gen_helper_trace_vfetch(dc->pc);
+
if (dc->thumb) {
disas_thumb_insn(env, dc);
if (dc->condexec_mask) {
@@ -3294,6 +3294,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
dc->clear_x = 1;
+ gen_helper_trace_vfetch(dc->pc);
+
insn_len = dc->decoder(dc);
dc->ppc = dc->pc;
@@ -7824,6 +7824,8 @@ static inline void gen_intermediate_code_internal(CPUState *env,
tcg_gen_debug_insn_start(pc_ptr);
}
+ gen_helper_trace_vfetch(pc_ptr);
+
pc_ptr = disas_insn(dc, pc_ptr);
num_insns++;
/* stop translation if indicated */
@@ -1076,6 +1076,8 @@ static void gen_intermediate_code_internal(CPUState *env,
tcg_gen_debug_insn_start(dc->pc);
}
+ gen_helper_trace_vfetch(dc->pc);
+
decode(dc);
dc->pc += 4;
num_insns++;
@@ -3022,6 +3022,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
tcg_gen_debug_insn_start(dc->pc);
}
+ gen_helper_trace_vfetch(dc->pc);
+
dc->insn_pc = dc->pc;
disas_m68k_insn(env, dc);
num_insns++;
@@ -1687,6 +1687,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
tcg_gen_debug_insn_start(dc->pc);
}
+ gen_helper_trace_vfetch(dc->pc);
+
dc->clear_imm = 1;
decode(dc);
if (dc->clear_imm)
@@ -12445,6 +12445,8 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
tcg_gen_debug_insn_start(ctx.pc);
}
+ gen_helper_trace_vfetch(ctx.pc);
+
is_branch = 0;
if (!(ctx.hflags & MIPS_HFLAG_M16)) {
ctx.opcode = ldl_code(ctx.pc);
@@ -9494,6 +9494,8 @@ static inline void gen_intermediate_code_internal(CPUState *env,
tcg_gen_debug_insn_start(ctx.nip);
}
+ gen_helper_trace_vfetch(ctx.nip);
+
if (unlikely(ctx.le_mode)) {
ctx.opcode = bswap32(ldl_code(ctx.nip));
} else {
@@ -5182,6 +5182,9 @@ static inline void gen_intermediate_code_internal(CPUState *env,
LOG_DISAS("pc " TARGET_FMT_lx "\n",
dc.pc);
#endif
+
+ gen_helper_trace_vfetch(dc.pc);
+
disas_s390_insn(&dc);
num_insns++;
@@ -1999,6 +1999,8 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
fprintf(stderr, "Loading opcode at address 0x%08x\n", ctx.pc);
fflush(stderr);
#endif
+ gen_helper_trace_vfetch(ctx.pc);
+
ctx.opcode = lduw_code(ctx.pc);
decode_opc(&ctx);
num_insns++;
@@ -5299,6 +5299,8 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
tcg_gen_debug_insn_start(dc->pc);
}
+ gen_helper_trace_vfetch(dc->pc);
+
last_pc = dc->pc;
disas_sparc_insn(dc);
num_insns++;
@@ -1924,6 +1924,8 @@ static inline void gen_intermediate_code_internal(CPUState *env,
tcg_gen_debug_insn_start(dc->pc);
}
+ gen_helper_trace_vfetch(dc->pc);
+
disas_uc32_insn(env, dc);
if (num_temps) {
@@ -2467,6 +2467,8 @@ static void gen_intermediate_code_internal(
tcg_gen_debug_insn_start(dc.pc);
}
+ gen_helper_trace_vfetch(dc.pc);
+
disas_xtensa_insn(&dc);
++insn_count;
if (env->singlestep_enabled) {
@@ -653,3 +653,10 @@ vcpu_reset(void *vcpu) "%p"
#
# vaddr : starting virtual address
disable tcg vbbl(uint64_t vaddr) "vaddr=0x%016"PRIx64
+
+# Start instruction execution
+#
+# Targets: all
+#
+# vaddr : instruction's virtual address
+disable tcg vfetch(uint64_t vaddr) "vaddr=0x%016"PRIx64
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> --- target-alpha/translate.c | 2 ++ target-arm/translate.c | 2 ++ target-cris/translate.c | 2 ++ target-i386/translate.c | 2 ++ target-lm32/translate.c | 2 ++ target-m68k/translate.c | 2 ++ target-microblaze/translate.c | 2 ++ target-mips/translate.c | 2 ++ target-ppc/translate.c | 2 ++ target-s390x/translate.c | 3 +++ target-sh4/translate.c | 2 ++ target-sparc/translate.c | 2 ++ target-unicore32/translate.c | 2 ++ target-xtensa/translate.c | 2 ++ trace-events | 7 +++++++ 15 files changed, 36 insertions(+), 0 deletions(-)