Patchwork powerpc: Add TBI PHY node to first MDIO bus

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Submitter Andy Fleming
Date Dec. 7, 2011, 7:50 p.m.
Message ID <1323287457-6085-1-git-send-email-afleming@freescale.com>
Download mbox | patch
Permalink /patch/130022/
State Accepted, archived
Delegated to: Kumar Gala
Headers show

Comments

Andy Fleming - Dec. 7, 2011, 7:50 p.m.
Systems which use the fsl_pq_mdio driver need to specify an
address for TBI PHY transactions such that the address does
not conflict with any PHYs on the bus (all transactions to
that address are directed to the onboard TBI PHY). The driver
used to scan for a free address if no address was specified,
however this ran into issues when the PHY Lib was fixed so
that all MDIO transactions were protected by a mutex. As it
is, the code was meant to serve as a transitional tool until
the device trees were all updated to specify the TBI address.

The best fix for the mutex issue was to remove the scanning code,
but it turns out some of the newer SoCs have started to omit
the tbi-phy node when SGMII is not being used. As such, these
devices will now fail unless we add a tbi-phy node to the first
mdio controller.

Signed-off-by: Andy Fleming <afleming@freescale.com>
---

This requires fsl_pq_mdio: Clean up tbi address configuration from
the net tree in order to achieve its full effect.

This needs to go into 3.2.

 arch/powerpc/boot/dts/p1010rdb.dts            |    5 +++++
 arch/powerpc/boot/dts/p1020rdb.dts            |    5 +++++
 arch/powerpc/boot/dts/p1020rdb_camp_core0.dts |    5 +++++
 arch/powerpc/boot/dts/p1021mds.dts            |    4 ++++
 arch/powerpc/boot/dts/p1022ds.dts             |    4 ++++
 arch/powerpc/boot/dts/p2020rdb.dts            |    8 ++++++--
 arch/powerpc/boot/dts/p2020rdb_camp_core0.dts |    4 ++++
 7 files changed, 33 insertions(+), 2 deletions(-)
David Miller - Dec. 7, 2011, 8:02 p.m.
From: Andy Fleming <afleming@freescale.com>
Date: Wed, 7 Dec 2011 13:50:57 -0600

> Systems which use the fsl_pq_mdio driver need to specify an
> address for TBI PHY transactions such that the address does
> not conflict with any PHYs on the bus (all transactions to
> that address are directed to the onboard TBI PHY). The driver
> used to scan for a free address if no address was specified,
> however this ran into issues when the PHY Lib was fixed so
> that all MDIO transactions were protected by a mutex. As it
> is, the code was meant to serve as a transitional tool until
> the device trees were all updated to specify the TBI address.
> 
> The best fix for the mutex issue was to remove the scanning code,
> but it turns out some of the newer SoCs have started to omit
> the tbi-phy node when SGMII is not being used. As such, these
> devices will now fail unless we add a tbi-phy node to the first
> mdio controller.
> 
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> ---
> 
> This requires fsl_pq_mdio: Clean up tbi address configuration from
> the net tree in order to achieve its full effect.
> 
> This needs to go into 3.2.

I'm fine if the powerpc tree takes this one:

Acked-by: David S. Miller <davem@davemloft.net>
Kumar Gala - Dec. 7, 2011, 9:52 p.m.
On Dec 7, 2011, at 2:02 PM, David Miller wrote:

> From: Andy Fleming <afleming@freescale.com>
> Date: Wed, 7 Dec 2011 13:50:57 -0600
> 
>> Systems which use the fsl_pq_mdio driver need to specify an
>> address for TBI PHY transactions such that the address does
>> not conflict with any PHYs on the bus (all transactions to
>> that address are directed to the onboard TBI PHY). The driver
>> used to scan for a free address if no address was specified,
>> however this ran into issues when the PHY Lib was fixed so
>> that all MDIO transactions were protected by a mutex. As it
>> is, the code was meant to serve as a transitional tool until
>> the device trees were all updated to specify the TBI address.
>> 
>> The best fix for the mutex issue was to remove the scanning code,
>> but it turns out some of the newer SoCs have started to omit
>> the tbi-phy node when SGMII is not being used. As such, these
>> devices will now fail unless we add a tbi-phy node to the first
>> mdio controller.
>> 
>> Signed-off-by: Andy Fleming <afleming@freescale.com>
>> ---
>> 
>> This requires fsl_pq_mdio: Clean up tbi address configuration from
>> the net tree in order to achieve its full effect.
>> 
>> This needs to go into 3.2.
> 
> I'm fine if the powerpc tree takes this one:
> 
> Acked-by: David S. Miller <davem@davemloft.net>

Will pull in via PPC tree.

- k
Kumar Gala - Dec. 8, 2011, 7:23 a.m.
On Dec 7, 2011, at 1:50 PM, Andy Fleming wrote:

> Systems which use the fsl_pq_mdio driver need to specify an
> address for TBI PHY transactions such that the address does
> not conflict with any PHYs on the bus (all transactions to
> that address are directed to the onboard TBI PHY). The driver
> used to scan for a free address if no address was specified,
> however this ran into issues when the PHY Lib was fixed so
> that all MDIO transactions were protected by a mutex. As it
> is, the code was meant to serve as a transitional tool until
> the device trees were all updated to specify the TBI address.
> 
> The best fix for the mutex issue was to remove the scanning code,
> but it turns out some of the newer SoCs have started to omit
> the tbi-phy node when SGMII is not being used. As such, these
> devices will now fail unless we add a tbi-phy node to the first
> mdio controller.
> 
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> ---
> 
> This requires fsl_pq_mdio: Clean up tbi address configuration from
> the net tree in order to achieve its full effect.
> 
> This needs to go into 3.2.
> 
> arch/powerpc/boot/dts/p1010rdb.dts            |    5 +++++
> arch/powerpc/boot/dts/p1020rdb.dts            |    5 +++++
> arch/powerpc/boot/dts/p1020rdb_camp_core0.dts |    5 +++++
> arch/powerpc/boot/dts/p1021mds.dts            |    4 ++++
> arch/powerpc/boot/dts/p1022ds.dts             |    4 ++++
> arch/powerpc/boot/dts/p2020rdb.dts            |    8 ++++++--
> arch/powerpc/boot/dts/p2020rdb_camp_core0.dts |    4 ++++
> 7 files changed, 33 insertions(+), 2 deletions(-)

applied to merge

- k

Patch

diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
index d6c669c..e1f9683 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -193,6 +193,11 @@ 
 				interrupts = <2 1>;
 				reg = <0x2>;
 			};
+
+			tbi-phy@3 {
+				device-type = "tbi-phy";
+				reg = <0x3>;
+			};
 		};
 
 		enet0: ethernet@b0000 {
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index d6a8ae4..72e4fc4 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -209,6 +209,11 @@ 
 				interrupts = <2 1>;
 				reg = <0x1>;
 			};
+
+			tbi-phy@2 {
+				device_type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@25000 {
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
index f0bf7f4..ad805a1 100644
--- a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
+++ b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
@@ -112,6 +112,11 @@ 
 				interrupts = <2 1>;
 				reg = <0x1>;
 			};
+
+			tbi-phy@2 {
+				device-type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@25000 {
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts
index ad5b852..ba53b4b 100644
--- a/arch/powerpc/boot/dts/p1021mds.dts
+++ b/arch/powerpc/boot/dts/p1021mds.dts
@@ -338,6 +338,10 @@ 
 				interrupt-parent = <&mpic>;
 				reg = <0x4>;
 			};
+			tbi-phy@5 {
+				device_type = "tbi-phy";
+				reg = <0x5>;
+			};
 		};
 
 		mdio@25000 {
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 89ca93e..4bf382d 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -391,6 +391,10 @@ 
 				interrupts = <9 1 0 0>;
 				reg = <0x2>;
 			};
+			tbi-phy@2 {
+				device_type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@25000 {
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 1d7a05f..9e4ae85 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -205,12 +205,16 @@ 
 				interrupt-parent = <&mpic>;
 				interrupts = <3 1>;
 				reg = <0x0>;
-				};
+			};
 			phy1: ethernet-phy@1 {
 				interrupt-parent = <&mpic>;
 				interrupts = <3 1>;
 				reg = <0x1>;
-				};
+			};
+			tbi-phy@2 {
+				device_type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@25520 {
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
index fc8dddd..8e5bda1 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
@@ -122,6 +122,10 @@ 
 				interrupts = <3 1>;
 				reg = <0x1>;
 			};
+			tbi-phy@2 {
+				device_type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@25520 {