From patchwork Tue Dec 6 04:38:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Lee X-Patchwork-Id: 129533 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5BB441007D5 for ; Tue, 6 Dec 2011 15:42:20 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RXmoH-0002pk-U3; Tue, 06 Dec 2011 04:39:18 +0000 Received: from mail-qw0-f42.google.com ([209.85.216.42]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RXmnU-0002hv-4O for linux-arm-kernel@lists.infradead.org; Tue, 06 Dec 2011 04:38:28 +0000 Received: by mail-qw0-f42.google.com with SMTP id j40so1046266qab.15 for ; Mon, 05 Dec 2011 20:38:28 -0800 (PST) Received: by 10.224.32.16 with SMTP id a16mr10461959qad.85.1323146307938; Mon, 05 Dec 2011 20:38:27 -0800 (PST) Received: from b18647-20 ([23.19.172.17]) by mx.google.com with ESMTPS id fm5sm29806936qab.20.2011.12.05.20.38.26 (version=SSLv3 cipher=OTHER); Mon, 05 Dec 2011 20:38:27 -0800 (PST) From: Robert Lee To: linux@arm.linux.org.uk, s.hauer@pengutronix.de Subject: [RFC PATCH 7/8] ARM: imx: Add mx5 clock changes necessary for low power Date: Mon, 5 Dec 2011 22:38:10 -0600 Message-Id: <1323146291-10676-8-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1323146291-10676-1-git-send-email-rob.lee@linaro.org> References: <1323146291-10676-1-git-send-email-rob.lee@linaro.org> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.216.42 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: khilman@ti.com, kgene.kim@samsung.com, mturquette@linaro.org, patches@linaro.org, nicolas.ferre@atmel.com, daniel.lezcano@linaro.org, magnus.damm@gmail.com, nsekhar@ti.com, amit.kachhap@linaro.org, amit.kucheria@linaro.org, vincent.guittot@linaro.org, arnd.bergmann@linaro.org, linux@maxim.org.za, shawn.guo@freescale.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Add mx5 clock changes necessary to enter low power operating modes. Signed-off-by: Robert Lee --- arch/arm/mach-mx5/clock-mx51-mx53.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 4cb2769..12c8a2b 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1533,6 +1533,7 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK("imx53-ahci.0", "ahci", sata_clk) _REGISTER_CLOCK("imx53-ahci.0", "ahci_phy", ahci_phy_clk) _REGISTER_CLOCK("imx53-ahci.0", "ahci_dma", ahci_dma_clk) + _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk) }; static void clk_tree_init(void) @@ -1572,6 +1573,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, clk_enable(&cpu_clk); clk_enable(&main_bus_clk); + clk_enable(&gpc_dvfs_clk); clk_enable(&iim_clk); imx_print_silicon_rev("i.MX51", mx51_revision()); @@ -1615,6 +1617,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, clk_set_parent(&uart_root_clk, &pll3_sw_clk); clk_enable(&cpu_clk); clk_enable(&main_bus_clk); + clk_enable(&gpc_dvfs_clk); clk_enable(&iim_clk); imx_print_silicon_rev("i.MX53", mx53_revision());