From patchwork Fri Dec 2 17:02:31 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 128923 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CF947B6F6B for ; Sat, 3 Dec 2011 04:05:37 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RWWVX-0004oa-D5; Fri, 02 Dec 2011 17:02:43 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RWWVT-0004nm-K8 for linux-arm-kernel@lists.infradead.org; Fri, 02 Dec 2011 17:02:40 +0000 Received: from mudshark.cambridge.arm.com (mudshark.cambridge.arm.com [10.1.79.58]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id pB2H2WWJ018818; Fri, 2 Dec 2011 17:02:32 GMT Date: Fri, 2 Dec 2011 17:02:31 +0000 From: Will Deacon To: linux@arm.linux.org.uk Subject: [GIT PULL] ARM perf updates for 3.3 Message-ID: <20111202170231.GP5540@mudshark.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-Spam-Note: CRM114 invocation failed X-Spam-Score: -5.4 (-----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-5.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [217.140.96.50 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Hi Russell, Please pull these updates to the ARM perf code for 3.3. The highlights are probably the CTI stuff (which is in preparation for OMAP4 support coming from Lei Ming, Benoit and Paul) and the cleanup of the event numbers for ARMv7 so that they are easier to follow. I was hoping to add Cortex-A7 support but I haven't got my paws on an FPGA yet. I've not included my contextidr patch with this pull because it conflicts quite badly with the LPAE patches. I can rework this for 3.4 later on (I already have a fixup). Cheers, Will The following changes since commit 5611cc4572e889b62a7b4c72a413536bf6a9c416: Linux 3.2-rc4 (2011-12-01 14:56:01 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-rmk Ming Lei (2): arm: introduce cross trigger interface helpers arm: pmu: allow platform specific irq enable/disable handling Will Deacon (4): ARM: perf: clean and update ARMv7 event numbers ARM: perf: add support for stalled cycle ABI events ARM: perf: remove unused armpmu_get_max_events Merge branches 'perf/event-nos', 'perf/updates' and 'perf/omap4' into for-rmk arch/arm/include/asm/cti.h | 179 ++++++++++++++++ arch/arm/include/asm/perf_event.h | 3 - arch/arm/include/asm/pmu.h | 15 +- arch/arm/kernel/perf_event.c | 19 +- arch/arm/kernel/perf_event_v6.c | 32 ++-- arch/arm/kernel/perf_event_v7.c | 401 +++++++++++++---------------------- arch/arm/kernel/perf_event_xscale.c | 16 +- 7 files changed, 379 insertions(+), 286 deletions(-) create mode 100644 arch/arm/include/asm/cti.h Acked-by: Marc Zyngier