From patchwork Wed Nov 30 06:31:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jett.Zhou" X-Patchwork-Id: 128422 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-pz0-f56.google.com (mail-pz0-f56.google.com [209.85.210.56]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id A94C3B6F76 for ; Wed, 30 Nov 2011 17:31:52 +1100 (EST) Received: by pzk6 with SMTP id 6sf82567pzk.11 for ; Tue, 29 Nov 2011 22:31:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=beta; h=mime-version:x-beenthere:received-spf:from:to:subject:date :message-id:x-mailer:x-originalarrivaltime:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-type; bh=214c3QW6ZczwH4QvnYRqwFBAOS8TwiGfbyXfIRgArdc=; b=epb6u5quww9ZuUJn/wOstw53TOZuh9+wvZTt4PJxIozopdfr3fVdFQf8nhrHvclt6b EOXyhv/tm6TXZ4CU15m2iSPEplwtErQWF41xSFvfpffSkFKnTdFl43Z+Zj+tlpmiwJEO c0KMhK81X/MhckLmlJG/T1BZF74SxSj+kCNaI= Received: by 10.68.38.200 with SMTP id i8mr195944pbk.13.1322634709648; Tue, 29 Nov 2011 22:31:49 -0800 (PST) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.68.42.101 with SMTP id n5ls6422366pbl.6.gmail; Tue, 29 Nov 2011 22:31:49 -0800 (PST) Received: by 10.68.35.68 with SMTP id f4mr2595539pbj.5.1322634709472; Tue, 29 Nov 2011 22:31:49 -0800 (PST) Received: by 10.68.35.68 with SMTP id f4mr2595538pbj.5.1322634709463; Tue, 29 Nov 2011 22:31:49 -0800 (PST) Received: from na3sys009aog101.obsmtp.com ([74.125.149.67]) by gmr-mx.google.com with SMTP id x5si1931956pbb.1.2011.11.29.22.31.46; Tue, 29 Nov 2011 22:31:49 -0800 (PST) Received-SPF: error (google.com: error in processing during lookup of jtzhou@marvell.com: DNS timeout) client-ip=74.125.149.67; Received: from MSI-MTA.marvell.com ([65.219.4.132]) by na3sys009aob101.postini.com ([74.125.148.12]) with SMTP ID DSNKTtXN0RBDnh/f66y/Pcrb2bzHL2sxPDCC@postini.com; Tue, 29 Nov 2011 22:31:49 PST Received: from maili.marvell.com ([10.68.76.210]) by MSI-MTA.marvell.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 29 Nov 2011 22:31:41 -0800 Received: from localhost (unknown [10.38.34.140]) by maili.marvell.com (Postfix) with ESMTP id 7E7364E4BC; Tue, 29 Nov 2011 22:31:41 -0800 (PST) From: "Jett.Zhou" To: robert.jarzmik@free.fr, a.zummo@towertech.it, haojian.zhuang@gmail.com, arnd@arndb.de, plagnioj@jcrosoft.com, linux-arm-kernel@lists.infradead.org, jtzhou@marvell.com, rtc-linux@googlegroups.com Subject: [rtc-linux] [V3 4/6] ARM: pxa: add dummy clock for sa1100-rtc Date: Wed, 30 Nov 2011 14:31:19 +0800 Message-Id: <1322634679-4508-1-git-send-email-jtzhou@marvell.com> X-Mailer: git-send-email 1.7.0.4 X-OriginalArrivalTime: 30 Nov 2011 06:31:41.0677 (UTC) FILETIME=[B8DAD1D0:01CCAF29] X-Original-Sender: jtzhou@marvell.com X-Original-Authentication-Results: gmr-mx.google.com; spf=temperror (google.com: error in processing during lookup of jtzhou@marvell.com: DNS timeout) smtp.mail=jtzhou@marvell.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , Now sa1100-rtc can support sa1100/pxa/mmp soc series, then we need add dummy clock for sa1100-rtc. Signed-off-by: Jett.Zhou Acked-by: Jean-Christophe PLAGNIOL-VILLARD --- arch/arm/mach-pxa/pxa25x.c | 1 + arch/arm/mach-pxa/pxa27x.c | 1 + arch/arm/mach-pxa/pxa300.c | 1 + arch/arm/mach-pxa/pxa320.c | 1 + arch/arm/mach-pxa/pxa3xx.c | 1 + arch/arm/mach-pxa/pxa95x.c | 1 + 6 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index f05f948..883b3b6 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -208,6 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = { INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), + INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), }; static struct clk_lookup pxa25x_hwuart_clkreg = diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index bc5a98e..237f531 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -229,6 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = { INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), + INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), }; #ifdef CONFIG_PM diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index 40bb165..0388eda 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c @@ -89,6 +89,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0); static struct clk_lookup common_clkregs[] = { INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), + INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), }; static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index 8d614ec..d487e1f 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c @@ -83,6 +83,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0); static struct clk_lookup pxa320_clkregs[] = { INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), + INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), }; static int __init pxa320_init(void) diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 0737c59..89675e3 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -67,6 +67,7 @@ static struct clk_lookup pxa3xx_clkregs[] = { INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), /* Power I2C clock is always on */ INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), + INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL), INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"), INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"), diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index 51371b3..210b722 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c @@ -217,6 +217,7 @@ static struct clk_lookup pxa95x_clkregs[] = { INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), /* Power I2C clock is always on */ INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), + INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),