From patchwork Tue Nov 29 05:21:12 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabe Black X-Patchwork-Id: 128214 X-Patchwork-Delegate: graeme.russ@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1CEA71007D2 for ; Tue, 29 Nov 2011 16:21:28 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 623682823A; Tue, 29 Nov 2011 06:21:26 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uR8nu0C9gWQU; Tue, 29 Nov 2011 06:21:26 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1CF8428240; Tue, 29 Nov 2011 06:21:24 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8200728240 for ; Tue, 29 Nov 2011 06:21:21 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pve5mdth1KoH for ; Tue, 29 Nov 2011 06:21:20 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yw0-f74.google.com (mail-yw0-f74.google.com [209.85.213.74]) by theia.denx.de (Postfix) with ESMTPS id 0FAF72823A for ; Tue, 29 Nov 2011 06:21:18 +0100 (CET) Received: by ywb26 with SMTP id 26so549891ywb.3 for ; Mon, 28 Nov 2011 21:21:17 -0800 (PST) Received: by 10.101.41.11 with SMTP id t11mr1808662anj.47.1322544077395; Mon, 28 Nov 2011 21:21:17 -0800 (PST) Received: by 10.101.41.11 with SMTP id t11mr1808642anj.47.1322544077253; Mon, 28 Nov 2011 21:21:17 -0800 (PST) Received: from wpzn3.hot.corp.google.com (216-239-44-65.google.com [216.239.44.65]) by gmr-mx.google.com with ESMTPS id f15si11422213anq.1.2011.11.28.21.21.17 (version=TLSv1/SSLv3 cipher=AES128-SHA); Mon, 28 Nov 2011 21:21:17 -0800 (PST) Received: from wpaz1.hot.corp.google.com (wpaz1.hot.corp.google.com [172.24.198.65]) by wpzn3.hot.corp.google.com (Postfix) with ESMTPS id 33E7410004D; Mon, 28 Nov 2011 21:21:17 -0800 (PST) Received: from gabeblack.mtv.corp.google.com (gabeblack.mtv.corp.google.com [172.22.72.31]) by wpaz1.hot.corp.google.com with ESMTP id pAT5LF5c020743; Mon, 28 Nov 2011 21:21:15 -0800 Received: by gabeblack.mtv.corp.google.com (Postfix, from userid 134246) id 4CC4F2008C9; Mon, 28 Nov 2011 21:21:15 -0800 (PST) From: Gabe Black To: U-Boot Mailing List Date: Mon, 28 Nov 2011 21:21:12 -0800 Message-Id: <1322544072-16592-1-git-send-email-gabeblack@chromium.org> X-Mailer: git-send-email 1.7.3.1 X-System-Of-Record: true Subject: [U-Boot] [PATCH] x86: Fix IDE configuration for the coreboot board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The ports for the IDE controller were reversed. Because u-boot was configured to look for at most one bus with one disk attached, it looked at the wrong one, didn't find anything, and quit looking. This change does not increase the number of busses or devices per bus that u-boot should check for because scanning for them adds a noticable pause during boot. It does, however, correct some comments describing the limits. Signed-off-by: Gabe Black --- include/configs/coreboot.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index c658436..348a25b 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -67,14 +67,14 @@ #define CONFIG_SYS_NS16550_COM2 UART1_BASE #define CONFIG_SYS_NS16550_PORT_MAPPED -/* max. 2 IDE busses */ +/* max. 1 IDE bus */ #define CONFIG_SYS_IDE_MAXBUS 1 -/* max. 2 drives per IDE bus */ +/* max. 1 drive per IDE bus */ #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1) #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0170 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x01F0 +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 #define CONFIG_SYS_ATA_DATA_OFFSET 0 #define CONFIG_SYS_ATA_REG_OFFSET 0 #define CONFIG_SYS_ATA_ALT_OFFSET 0x200